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Re: [Qemu-devel] [PATCH 0/2] tcg/optimize fix for known-zero bits
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 0/2] tcg/optimize fix for known-zero bits |
Date: |
Tue, 27 May 2014 12:06:18 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 05/23/2014 11:57 AM, Richard Henderson wrote:
> This specific bug may only be visible on s390. It is unique in that it
> has a 32-bit register move operation that does not modify the high bits
> of the 64-bit register. Unlike x86_64 + aarch64 which zero the high
> bits, or sparc64 + ppc64 that copy all 64-bits even for a 32-bit move.
For the record, my outstanding ppc64 patch set has a problem due
to this as well.
It comes from the use of the "mulhwu" insn in implementing the muluh_i32
opcode, wherein the high 32-bits of the mulhwu insn are undefined. Without
this patch set applied, we incorrectly drop the ext32u that had been present in
the opcode stream.
r~