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Re: [Qemu-devel] [PATCH v3 18/24] target-ppc: Add POWER8's FSCR SPR

From: Alexander Graf
Subject: Re: [Qemu-devel] [PATCH v3 18/24] target-ppc: Add POWER8's FSCR SPR
Date: Wed, 28 May 2014 02:19:07 +0200
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.9; rv:24.0) Gecko/20100101 Thunderbird/24.5.0

On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This adds an FSCR (Facility Status and Control Register) SPR.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
  target-ppc/cpu.h            | 1 +
  target-ppc/translate_init.c | 9 +++++++++
  2 files changed, 10 insertions(+)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index d0238e6..c2a84fd 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1272,6 +1272,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
  #define SPR_CTRL              (0x098)
  #define SPR_MPC_CMPE          (0x098)
  #define SPR_MPC_CMPF          (0x099)
+#define SPR_FSCR              (0x099)
  #define SPR_MPC_CMPG          (0x09A)
  #define SPR_MPC_CMPH          (0x09B)
  #define SPR_MPC_LCTRL1        (0x09C)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6bcb41c..0682739 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7598,6 +7598,14 @@ static void gen_spr_power8_branch_control(CPUPPCState 
+static void gen_spr_power8_common(CPUPPCState *env)

This is part of the "facility" extension, no? Just call it that way :).

+    spr_register_kvm(env, SPR_FSCR, "FSCR",
+                     SPR_NOACCESS, SPR_NOACCESS,
+                     &spr_read_generic, &spr_write_generic,

I think we will need at least a tb_flush() on FSCR write to make sure that all translated "invalid instruction" operations get retranslated.


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