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[Qemu-devel] [PATCH 00/21] target-mips: add MIPS64R6 Instruction Set sup

From: Leon Alrae
Subject: [Qemu-devel] [PATCH 00/21] target-mips: add MIPS64R6 Instruction Set support
Date: Fri, 30 May 2014 15:47:38 +0100

The following patchset implements MIPS64 Release 6 Instruction Set.
New instructions are added and also there is a number of instructions which
are deleted or moved (the encodings have changed).

The MIPS64 Release 6 documentation is available:

The following patch series is focusing on instruction set changes only.
There is also a new generic cpu supporting R6.

Please note that even though the new Floating Point instructions were added,
softfloat for MIPS has not been updated yet (in R6 MIPS FPU is updated to
IEEE2008). Also, current patchset does not include MIPS64 Privileged Resource
Architecture modifications. All those changes will follow the current patchset

Leon Alrae (17):
  target-mips: introduce MIPS64R6 ISA and a new generic CPU
  target-mips: signal RI Exception on instructions removed in R6
  target-mips: add SELEQZ and SELNEZ instructions
  target-mips: move LL and SC instructions
  target-mips: extract decode_opc_special* from decode_opc
  target-mips: split decode_opc_special* into *_r6 and *_legacy
  target-mips: signal RI Exception on DSP and Loongson instructions
  target-mips: move PREF, CACHE, LLD and SCD instructions
  target-mips: redefine Integer Multiply and Divide instructions
  target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6
  target-mips: Status.UX/SX/KX enable 32-bit address wrapping
  target-mips: add Addressing and PC-relative instructions
  softfloat: add functions corresponding to IEEE-2008 min/maxNumMag
  target-mips: add new Floating Point instructions
  target-mips: do not allow Status.FR=0 mode in 64-bit FPU
  mips_malta: update malta's pseudo-bootloader - replace JR with JALR
  target-mips: use pointers referring to appropriate decoding function

Yongbok Kim (4):
  target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions
  target-mips: add Compact Branches
  target-mips: add new Floating Point Comparison instructions
  target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions

 disas/mips.c                 |  210 +++-
 fpu/softfloat.c              |   37 +-
 hw/mips/mips_malta.c         |   10 +-
 include/fpu/softfloat.h      |    4 +
 target-mips/cpu.h            |   19 +-
 target-mips/helper.h         |   50 +
 target-mips/mips-defs.h      |   28 +-
 target-mips/op_helper.c      |  237 +++
 target-mips/translate.c      | 3886 +++++++++++++++++++++++++++++++-----------
 target-mips/translate_init.c |   29 +
 10 files changed, 3486 insertions(+), 1024 deletions(-)


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