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Re: [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC insn
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From: |
Alex Bennée |
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Subject: |
Re: [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC insn |
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Date: |
Wed, 04 Jun 2014 08:26:51 +0100 |
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User-agent: |
mu4e 0.9.9.6pre3; emacs 24.3.91.3 |
Edgar E. Iglesias writes:
> On Tue, Jun 03, 2014 at 11:41:25AM +0100, Alex Bennée wrote:
>>
>> Edgar E. Iglesias writes:
>> > static inline void arm_log_exception(int idx)
>> > @@ -204,6 +205,11 @@ static inline uint32_t syn_aa64_svc(uint32_t imm16)
>> > return (EC_AA64_SVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 &
>> > 0xffff);
>> > }
>> >
>> > +static inline uint32_t syn_aa64_hvc(uint32_t imm16)
>> > +{
>> > + return (EC_AA64_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 &
>> > 0xffff);
>> > +}
>>
>> The mask seems superfluous (as it is for arm_log_exception)
>
> Sorry, can you clarify what you mean here? Are you refering to the imm16?
Yes the imm16. It's the result of an extract32(..,..,16) so I can't see
how it wouldn't already be correctly masked.
--
Alex Bennée