|
From: | Greg Bellows |
Subject: | Re: [Qemu-devel] [PATCH v3 05/32] target-arm: reject switching to monitor mode |
Date: | Tue, 24 Jun 2014 08:43:38 -0500 |
Hm…yes, this case is missing, but it is only missing for ARMv7 as this bit is RES0 in ARMv8. Even in ARMv7 it is IMPDEF whether
this bit is supported. And since ARMv7 mentions, that this bit is deprecated from the introduction of Virtualization Extensions
I did not care to add this special case.
On 10 June 2014 18:54, Fabian Aggeler <address@hidden<mailto:address@hidden>> wrote:
On 12 Jun 2014, at 23:55, Greg Bellows <address@hidden<mailto:address@hidden>> wrote:
Missing case where it is UNPREDICTABLE to enter FIQ mode from non-secure state if NSACR.RFR is 1.
From: Sergey Fedorov <address@hidden<mailto:address@hidden>>
...from non-secure state.
Signed-off-by: Sergey Fedorov <address@hidden<mailto:address@hidden>>
Signed-off-by: Fabian Aggeler <address@hidden<mailto:address@hidden>>
---
target-arm/helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index d8d6637..ace8d8b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3049,6 +3049,8 @@ static int bad_mode_switch(CPUARMState *env, int mode)
case ARM_CPU_MODE_IRQ:
case ARM_CPU_MODE_FIQ:
return 0;
+ case ARM_CPU_MODE_MON:
+ return !arm_is_secure(env);
default:
return 1;
}
--
1.8.3.2
[Prev in Thread] | Current Thread | [Next in Thread] |