Re: [Qemu-devel] [PATCH v2 06/15] target-tricore: Add instructions of SRC opcode format

[Bastian Koppelmann]

> > +        tcg_gen_addi_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], const4);
> Are you planning to come back to implement V and AV bits later?
Would you recommend implementing this as a helper? It seems rather 
complex. Especially with half-word and byte arithmetic. On the other 
hand the instructions using this are common and would benefit from 
open-coding it in TCG.

Thanks,

Bastian