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Re: [Qemu-devel] [PATCH 2/3] target-arm: A64: fix TLB flush instructions
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 2/3] target-arm: A64: fix TLB flush instructions |
Date: |
Thu, 24 Jul 2014 17:09:31 +0100 |
On 24 July 2014 16:52, Alex Bennée <address@hidden> wrote:
> +/* See: D4.7.2 TLB maintenance requirements and the TLB maintenance
> instructions
> + * Page D4-1736 (DDI0487A.b) "For TLB maintenance instructions that
> + * take an address, the maintenance of VA[63:56] is interpreted as
> + * being the same as the maintenance of VA[55]"
> + */
I'd rather we didn't quote this bit of the ARM ARM, because it's
obviously mangled (I'm pretty sure it should say "the value of
VA[..]").
Otherwise
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM