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Re: [Qemu-devel] [PATCH v2 5/5] target-arm: A64: disable a bunch of ARMv
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v2 5/5] target-arm: A64: disable a bunch of ARMv5 machines |
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Date: |
Fri, 1 Aug 2014 18:32:25 +0100 |
On 1 August 2014 17:45, Christopher Covington <address@hidden> wrote:
> On 07/30/2014 11:20 AM, Alex Bennée wrote:
>> If you attempt to run a system image which uses 1k pages in the
>> qemu-system-aarch64 build it will fail thanks to the change to 12 bit
>> pages. The boards are still available for the qemu-system-arm build.
>
> I fail to understand the correlation between ARMv5 machines and software use
> of 1M sections. Are AArch32, the short descriptor translation table format,
> and 1M sections optional and unimplemented in newer machines like those using
> the Cortex A15 or Cortex A57?
The commit message says 1K, not 1M, and it means it. These
"tiny pages" were supported by v4 and v5 MMUs, but not by
v6 onwards, where the smallest possible pagesize is 4K.
thanks
-- PMM