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Re: [Qemu-devel] [PATCH target-arm v3 8/8] target-arm: Call pmccntr_sync
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH target-arm v3 8/8] target-arm: Call pmccntr_sync() when swapping ELs |
Date: |
Mon, 18 Aug 2014 18:36:22 +1000 |
On Mon, Aug 18, 2014 at 6:32 PM, Peter Maydell <address@hidden> wrote:
> On 18 August 2014 09:16, Peter Crosthwaite <address@hidden> wrote:
>> Call the pmccntr_sync() when the EL changes. All Runtime changes
>> of EL are done as a pstate_write so we can catch these EL-change side
>> effects here.
>
> Hmm. This probably clashes badly with Alex's cleanup of how we
> handle pstate writes... I'm not sure I really want more side
> effects in pstate_write(), either; the ones we have in cpsr_write()
> are pretty annoying (makes migration load awkward).
>
Well what exactly can we do then? Do we need another fn between el
change logic and pstate_write where we can dump el change side
effects?
At the end of the day, changing EL does have side effects so we need a
common place for this stuff.
Regards,
Peter
>> Signed-off-by: Peter Crosthwaite <address@hidden>
>> ---
>>
>> target-arm/cpu.h | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
>> index 5bc2afe..2533fc0 100644
>> --- a/target-arm/cpu.h
>> +++ b/target-arm/cpu.h
>> @@ -503,12 +503,24 @@ static inline uint32_t pstate_read(CPUARMState *env)
>>
>> static inline void pstate_write(CPUARMState *env, uint32_t val)
>> {
>> +#ifndef CONFIG_USER_ONLY
>> + bool pmccntr_need_sync = (env->pstate ^ val) & PSTATE_M;
>> +
>> + if (pmccntr_need_sync) {
>> + pmccntr_sync(env);
>> + }
>> +#endif
>> env->ZF = (~val) & PSTATE_Z;
>> env->NF = val;
>> env->CF = (val >> 29) & 1;
>> env->VF = (val << 3) & 0x80000000;
>> env->daif = val & PSTATE_DAIF;
>> env->pstate = val & ~CACHED_PSTATE_BITS;
>> +#ifndef CONFIG_USER_ONLY
>> + if (pmccntr_need_sync) {
>> + pmccntr_sync(env);
>> + }
>> +#endif
>> }
>>
>> /* Return the current CPSR value. */
>> --
>> 2.0.1.1.gfbfc394
>
> thanks
> -- PMM
>
- [Qemu-devel] [PATCH target-arm v3 0/8] target-arm: Extend PMCCNTR for ARMv8, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 1/8] target-arm: Make the ARM PMCCNTR register 64-bit, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 2/8] arm: Implement PMCCNTR 32b read-modify-write, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 3/8] target-arm: Implement PMCCNTR_EL0 and related registers, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 4/8] target-arm: Add arm_ccnt_enabled function, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 5/8] target-arm: Implement pmccntr_sync function, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 6/8] target-arm: Remove old code and replace with new functions, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 7/8] target-arm: Implement pmccfiltr_write function, Peter Crosthwaite, 2014/08/18
- [Qemu-devel] [PATCH target-arm v3 8/8] target-arm: Call pmccntr_sync() when swapping ELs, Peter Crosthwaite, 2014/08/18