[Qemu-devel] [PATCH v7 00/15] TriCore architecture guest implementation

[Bastian Koppelmann]

Hi,

my aim is to add Infineon's TriCore architecture to QEMU. This series of 
patches adds the target stubs, a basic testboard and a softmmu for system mode 
emulation. Furthermore it adds all the 16 bit long instructions of the 
architecture grouped by opcode format.

After this series of patches. Another one will follow, which adds a lot of the 
32 bit long instructions.

All the best

Bastian

v6 -> v7:
    - TRICORECPU -> TriCoreCPU.
    - TRICORECPUClass -> TriCoreCPUClass.
    - CPUTRICOREState -> CPUTriCoreState.
    - TRICORECPUInfo: Add terminator.
    - TRICORECPUInfo -> TriCoreCPUInfo.
    - Remove ARM-style IRQ and FIQ lines.
    - CPUTRICOREState: target_ulong -> uint32_t.
    - CPUTRICOREState: Move mask defines below the struct.
    - tricore_testboard.c: Change Licence to GPL v2.
    - fprintf(stderr, ..) -> error_report(..).
    - tricore_boot_info: Remove unused fields.
    - tricore_testboard.c: Remove flash drive.
    - tricore_testboard.c: Is not default anymore, change desc.
    - configure: Remove empty disas case. Remove target_phys_bits=32.
    - tricore-softmmu.mak: Remove pci, SMC91C111 and PFLASH_CFI01.


Bastian Koppelmann (15):
  target-tricore: Add target stubs and qom-cpu
  target-tricore: Add board for systemmode
  target-tricore: Add softmmu support
  target-tricore: Add initialization for translation and activate target
  target-tricore: Add masks and opcodes for decoding
  target-tricore: Add instructions of SRC opcode format
  target-tricore: Add instructions of SRR opcode format
  target-tricore: Add instructions of SSR opcode format
  target-tricore: Add instructions of SRRS and SLRO opcode format
  target-tricore: Add instructions of SB opcode format
  target-tricore: Add instructions of SBC and SBRN opcode format
  target-tricore: Add instructions of SBR opcode format
  target-tricore: Add instructions of SC opcode format
  target-tricore: Add instructions of SLR, SSRO and SRO opcode format
  target-tricore: Add instructions of SR opcode format

 MAINTAINERS                         |    6 +
 arch_init.c                         |    2 +
 configure                           |    2 +
 cpu-exec.c                          |   11 +-
 cpus.c                              |    6 +
 default-configs/tricore-softmmu.mak |    0
 hw/tricore/Makefile.objs            |    1 +
 hw/tricore/tricore_testboard.c      |  124 +++
 include/elf.h                       |    2 +
 include/hw/tricore/tricore.h        |   11 +
 include/sysemu/arch_init.h          |    1 +
 target-tricore/Makefile.objs        |    1 +
 target-tricore/cpu-qom.h            |   71 ++
 target-tricore/cpu.c                |  192 +++++
 target-tricore/cpu.h                |  405 ++++++++++
 target-tricore/helper.c             |  144 ++++
 target-tricore/helper.h             |   25 +
 target-tricore/op_helper.c          |  392 ++++++++++
 target-tricore/translate.c          | 1263 +++++++++++++++++++++++++++++++
 target-tricore/tricore-defs.h       |   28 +
 target-tricore/tricore-opcodes.h    | 1406 +++++++++++++++++++++++++++++++++++
 21 files changed, 4092 insertions(+), 1 deletion(-)
 create mode 100644 default-configs/tricore-softmmu.mak
 create mode 100644 hw/tricore/Makefile.objs
 create mode 100644 hw/tricore/tricore_testboard.c
 create mode 100644 include/hw/tricore/tricore.h
 create mode 100644 target-tricore/Makefile.objs
 create mode 100644 target-tricore/cpu-qom.h
 create mode 100644 target-tricore/cpu.c
 create mode 100644 target-tricore/cpu.h
 create mode 100644 target-tricore/helper.c
 create mode 100644 target-tricore/helper.h
 create mode 100644 target-tricore/op_helper.c
 create mode 100644 target-tricore/translate.c
 create mode 100644 target-tricore/tricore-defs.h
 create mode 100644 target-tricore/tricore-opcodes.h

-- 
2.1.0