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[Qemu-devel] [PATCH 14/23] target-arm: Use cpu_exec_interrupt qom hook
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 14/23] target-arm: Use cpu_exec_interrupt qom hook |
Date: |
Sat, 13 Sep 2014 09:45:25 -0700 |
Cc: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
cpu-exec.c | 23 -----------------------
target-arm/cpu-qom.h | 1 +
target-arm/cpu.c | 34 ++++++++++++++++++++++++++++++++++
target-arm/cpu64.c | 1 +
4 files changed, 36 insertions(+), 23 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index b7b012b..0d5ce62 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -562,29 +562,6 @@ int cpu_exec(CPUArchState *env)
}
}
}
-#elif defined(TARGET_ARM)
- if (interrupt_request & CPU_INTERRUPT_FIQ
- && !(env->daif & PSTATE_F)) {
- cpu->exception_index = EXCP_FIQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- /* ARMv7-M interrupt return works by loading a magic value
- into the PC. On real hardware the load causes the
- return to occur. The qemu implementation performs the
- jump normally, then does the exception return when the
- CPU tries to execute code at the magic address.
- This will cause the magic PC value to be pushed to
- the stack if an interrupt occurred at the wrong time.
- We avoid this by disabling interrupts when
- pc contains a magic address. */
- if (interrupt_request & CPU_INTERRUPT_HARD
- && !(env->daif & PSTATE_I)
- && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
#endif
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 07f3c9e..96a3da9 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -192,6 +192,7 @@ void init_cpreg_list(ARMCPU *cpu);
void arm_cpu_do_interrupt(CPUState *cpu);
void arm_v7m_cpu_do_interrupt(CPUState *cpu);
+bool arm_cpu_exec_interrupt(CPUState *cpu, int int_req);
void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
int flags);
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 7ea12bd..407f977 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -188,6 +188,39 @@ static void arm_cpu_reset(CPUState *s)
hw_watchpoint_update_all(cpu);
}
+bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ CPUClass *cc = CPU_GET_CLASS(cs);
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+ bool ret = false;
+
+ if (interrupt_request & CPU_INTERRUPT_FIQ
+ && !(env->daif & PSTATE_F)) {
+ cs->exception_index = EXCP_FIQ;
+ cc->do_interrupt(cs);
+ ret = true;
+ }
+ /* ARMv7-M interrupt return works by loading a magic value
+ into the PC. On real hardware the load causes the
+ return to occur. The qemu implementation performs the
+ jump normally, then does the exception return when the
+ CPU tries to execute code at the magic address.
+ This will cause the magic PC value to be pushed to
+ the stack if an interrupt occurred at the wrong time.
+ We avoid this by disabling interrupts when
+ pc contains a magic address. */
+ if (interrupt_request & CPU_INTERRUPT_HARD
+ && !(env->daif & PSTATE_I)
+ && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
+ cs->exception_index = EXCP_IRQ;
+ cc->do_interrupt(cs);
+ ret = true;
+ }
+
+ return ret;
+}
+
#ifndef CONFIG_USER_ONLY
static void arm_cpu_set_irq(void *opaque, int irq, int level)
{
@@ -1053,6 +1086,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->class_by_name = arm_cpu_class_by_name;
cc->has_work = arm_cpu_has_work;
cc->do_interrupt = arm_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->dump_state = arm_cpu_dump_state;
cc->set_pc = arm_cpu_set_pc;
cc->gdb_read_register = arm_cpu_gdb_read_register;
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index aa42803..c30f47e 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -197,6 +197,7 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void
*data)
CPUClass *cc = CPU_CLASS(oc);
cc->do_interrupt = aarch64_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->set_pc = aarch64_cpu_set_pc;
cc->gdb_read_register = aarch64_cpu_gdb_read_register;
cc->gdb_write_register = aarch64_cpu_gdb_write_register;
--
1.9.3
- Re: [Qemu-devel] [PATCH 09/23] target-m68k: Use cpu_exec_interrupt qom hook, (continued)
- [Qemu-devel] [PATCH 10/23] target-cris: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 12/23] target-sh4: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 11/23] target-alpha: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 13/23] target-unicore32: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 14/23] target-arm: Use cpu_exec_interrupt qom hook,
Richard Henderson <=
- [Qemu-devel] [PATCH 15/23] target-sparc: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 17/23] target-tricore: Remove the dummy interrupt boilerplate, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 18/23] target-mips: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 16/23] target-openrisc: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 20/23] target-lm32: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13
- [Qemu-devel] [PATCH 19/23] target-microblaze: Use cpu_exec_interrupt qom hook, Richard Henderson, 2014/09/13