Re: [Qemu-devel] [PATCH 16/23] target-openrisc: Use cpu_exec_interrupt qom hook

[Jia Liu]

Hi Richard,

Thank you!

Tested-by: Jia Liu <address@hidden>



On Sat, Sep 13, 2014 at 9:45 AM, Richard Henderson <address@hidden> wrote:
> Cc: Jia Liu <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  cpu-exec.c                  | 18 ------------------
>  target-openrisc/cpu.c       |  1 +
>  target-openrisc/cpu.h       |  1 +
>  target-openrisc/interrupt.c | 20 ++++++++++++++++++++
>  4 files changed, 22 insertions(+), 18 deletions(-)
>
> diff --git a/cpu-exec.c b/cpu-exec.c
> index 075abf9..81441e7 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -528,24 +528,6 @@ int cpu_exec(CPUArchState *env)
>                          cc->do_interrupt(cpu);
>                          next_tb = 0;
>                      }
> -
> -#elif defined(TARGET_OPENRISC)
> -                    {
> -                        int idx = -1;
> -                        if ((interrupt_request & CPU_INTERRUPT_HARD)
> -                            && (env->sr & SR_IEE)) {
> -                            idx = EXCP_INT;
> -                        }
> -                        if ((interrupt_request & CPU_INTERRUPT_TIMER)
> -                            && (env->sr & SR_TEE)) {
> -                            idx = EXCP_TICK;
> -                        }
> -                        if (idx >= 0) {
> -                            cpu->exception_index = idx;
> -                            cc->do_interrupt(cpu);
> -                            next_tb = 0;
> -                        }
> -                    }
>  #endif
>                      /* The target hook has 3 exit conditions:
>                         False when the interrupt isn't processed,
> diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
> index 08e724c..39bedc1 100644
> --- a/target-openrisc/cpu.c
> +++ b/target-openrisc/cpu.c
> @@ -165,6 +165,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void 
> *data)
>      cc->class_by_name = openrisc_cpu_class_by_name;
>      cc->has_work = openrisc_cpu_has_work;
>      cc->do_interrupt = openrisc_cpu_do_interrupt;
> +    cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
>      cc->dump_state = openrisc_cpu_dump_state;
>      cc->set_pc = openrisc_cpu_set_pc;
>      cc->gdb_read_register = openrisc_cpu_gdb_read_register;
> diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
> index 4512f45..69b96c6 100644
> --- a/target-openrisc/cpu.h
> +++ b/target-openrisc/cpu.h
> @@ -348,6 +348,7 @@ OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
>  void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
>  int cpu_openrisc_exec(CPUOpenRISCState *s);
>  void openrisc_cpu_do_interrupt(CPUState *cpu);
> +bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req);
>  void openrisc_cpu_dump_state(CPUState *cpu, FILE *f,
>                               fprintf_function cpu_fprintf, int flags);
>  hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c
> index 3de567e..e480cfd 100644
> --- a/target-openrisc/interrupt.c
> +++ b/target-openrisc/interrupt.c
> @@ -63,3 +63,23 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
>
>      cs->exception_index = -1;
>  }
> +
> +bool openrisc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
> +{
> +    OpenRISCCPU *cpu = OPENRISC_CPU(cs);
> +    CPUOpenRISCState *env = &cpu->env;
> +    int idx = -1;
> +
> +    if ((interrupt_request & CPU_INTERRUPT_HARD) && (env->sr & SR_IEE)) {
> +        idx = EXCP_INT;
> +    }
> +    if ((interrupt_request & CPU_INTERRUPT_TIMER) && (env->sr & SR_TEE)) {
> +        idx = EXCP_TICK;
> +    }
> +    if (idx >= 0) {
> +        cs->exception_index = idx;
> +        openrisc_cpu_do_interrupt(cs);
> +        return true;
> +    }
> +    return false;
> +}
> --
> 1.9.3
>

Regards,
Jia