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Re: [Qemu-devel] [PATCH 08/14] ppc: introduce gen_op_mfcr/gen_op_mtcr
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH 08/14] ppc: introduce gen_op_mfcr/gen_op_mtcr |
Date: |
Fri, 19 Sep 2014 15:31:01 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.0 |
Il 18/09/2014 23:38, Richard Henderson ha scritto:
> On 09/15/2014 08:03 AM, Paolo Bonzini wrote:
>> +static inline void gen_op_mfcr(TCGv_i32 dest, int first_cr, int shift)
>> +{
>> + tcg_gen_shli_i32(dest, cpu_crf[first_cr >> 2], shift);
>> +}
>> +
>> +static inline void gen_op_mtcr(int first_cr, TCGv_i32 src, int shift)
>> +{
>> + if (shift) {
>> + tcg_gen_shri_i32(cpu_crf[first_cr >> 2], src, shift);
>> + tcg_gen_andi_i32(cpu_crf[first_cr >> 2], cpu_crf[first_cr >> 2],
>> 0x0F);
>> + } else {
>> + tcg_gen_andi_i32(cpu_crf[first_cr >> 2], src, 0x0F);
>> + }
>> +}
>
> Continuing on the name nit-picking, these *are* the mfocr and mtocr
> operations.
Ok, will swap.
Paolo
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, (continued)
[Qemu-devel] [PATCH 06/14] ppc: introduce helpers for mfocrf/mtocrf, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 07/14] ppc: reorganize gen_compute_fprf, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 08/14] ppc: introduce gen_op_mfcr/gen_op_mtcr, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 09/14] ppc: introduce ppc_get_crf and ppc_set_crf, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 10/14] ppc: use movcond for isel, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 11/14] ppc: store CR registers in 32 1-bit registers, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 12/14] ppc: use movcond to implement evsel, Paolo Bonzini, 2014/09/15
[Qemu-devel] [PATCH 13/14] ppc: inline ppc_set_crf when clearer, Paolo Bonzini, 2014/09/15