Re: [Qemu-devel] [PATCH v5 3/7] stm32f205_SYSCFG: Add the stm32f205 SYSCFG

[Peter Crosthwaite]

On Thu, Oct 16, 2014 at 10:54 PM, Alistair Francis <address@hidden> wrote:
> This patch adds the stm32f205 System Configuration
> Controller. This is used to configure what memory is mapped
> at address 0 (although that is not supported) as well
> as configure how the EXTI interrupts work (also not
> supported at the moment).
>
> This device is not required for basic examples, but more
> complex systems will require it (as well as the EXTI device)
>
> Signed-off-by: Alistair Francis <address@hidden>
> ---
>  default-configs/arm-softmmu.mak    |   1 +
>  hw/misc/Makefile.objs              |   1 +
>  hw/misc/stm32f205_syscfg.c         | 160 
> +++++++++++++++++++++++++++++++++++++
>  include/hw/misc/stm32f205_syscfg.h |  61 ++++++++++++++
>  4 files changed, 223 insertions(+)
>  create mode 100644 hw/misc/stm32f205_syscfg.c
>  create mode 100644 include/hw/misc/stm32f205_syscfg.h
>
> diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
> index 422dec0..a2ea8f7 100644
> --- a/default-configs/arm-softmmu.mak
> +++ b/default-configs/arm-softmmu.mak
> @@ -80,6 +80,7 @@ CONFIG_ZAURUS=y
>  CONFIG_ZYNQ=y
>  CONFIG_STM32F205_TIMER=y
>  CONFIG_STM32F205_USART=y
> +CONFIG_STM32F205_SYSCFG=y
>
>  CONFIG_VERSATILE_PCI=y
>  CONFIG_VERSATILE_I2C=y
> diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
> index 979e532..63f03bd 100644
> --- a/hw/misc/Makefile.objs
> +++ b/hw/misc/Makefile.objs
> @@ -39,5 +39,6 @@ obj-$(CONFIG_OMAP) += omap_sdrc.o
>  obj-$(CONFIG_OMAP) += omap_tap.o
>  obj-$(CONFIG_SLAVIO) += slavio_misc.o
>  obj-$(CONFIG_ZYNQ) += zynq_slcr.o
> +obj-$(CONFIG_STM32F205_SYSCFG) += stm32f205_syscfg.o
>
>  obj-$(CONFIG_PVPANIC) += pvpanic.o
> diff --git a/hw/misc/stm32f205_syscfg.c b/hw/misc/stm32f205_syscfg.c
> new file mode 100644
> index 0000000..82aa50f
> --- /dev/null
> +++ b/hw/misc/stm32f205_syscfg.c
> @@ -0,0 +1,160 @@
> +/*
> + * STM32F205 SYSCFG

2XX

> + *
> + * Copyright (c) 2014 Alistair Francis <address@hidden>
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a 
> copy
> + * of this software and associated documentation files (the "Software"), to 
> deal
> + * in the Software without restriction, including without limitation the 
> rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#include "hw/misc/stm32f205_syscfg.h"
> +
> +#ifndef STM_SYSCFG_ERR_DEBUG
> +#define STM_SYSCFG_ERR_DEBUG 0
> +#endif
> +
> +#define DB_PRINT_L(lvl, fmt, args...) do { \
> +    if (STM_SYSCFG_ERR_DEBUG >= lvl) { \
> +        qemu_log("%s: " fmt, __func__, ## args); \
> +    } \
> +} while (0);
> +
> +#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
> +
> +static void stm32f205_syscfg_reset(DeviceState *dev)
> +{
> +    STM32f205SyscfgState *s = STM32F205_SYSCFG(dev);
> +
> +    s->syscfg_memrmp = 0x00000000;
> +    s->syscfg_pmc = 0x00000000;
> +    s->syscfg_exticr1 = 0x00000000;
> +    s->syscfg_exticr2 = 0x00000000;
> +    s->syscfg_exticr3 = 0x00000000;
> +    s->syscfg_exticr4 = 0x00000000;
> +    s->syscfg_cmpcr = 0x00000000;
> +}
> +
> +static uint64_t stm32f205_syscfg_read(void *opaque, hwaddr addr,
> +                                     unsigned int size)
> +{
> +    STM32f205SyscfgState *s = opaque;
> +
> +    DB_PRINT("0x%x\n", (uint) addr);
> +

HWADDR_PRIx

> +    switch (addr) {
> +    case SYSCFG_MEMRMP:
> +        return s->syscfg_memrmp;
> +    case SYSCFG_PMC:
> +        return s->syscfg_pmc;
> +    case SYSCFG_EXTICR1:
> +        return s->syscfg_exticr1;
> +    case SYSCFG_EXTICR2:
> +        return s->syscfg_exticr2;
> +    case SYSCFG_EXTICR3:
> +        return s->syscfg_exticr3;
> +    case SYSCFG_EXTICR4:
> +        return s->syscfg_exticr4;
> +    case SYSCFG_CMPCR:
> +        return s->syscfg_cmpcr;
> +    default:
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "STM32F205_syscfg_read: Bad offset %x\n", (int)addr);

%s __func, HWADDR_PRIx

> +        return 0;
> +    }
> +
> +    return 0;
> +}
> +
> +static void stm32f205_syscfg_write(void *opaque, hwaddr addr,
> +                       uint64_t val64, unsigned int size)
> +{
> +    STM32f205SyscfgState *s = opaque;
> +    uint32_t value = val64;
> +
> +    DB_PRINT("0x%x, 0x%x\n", value, (uint) addr);
> +

HWADDR_PRIx

> +    switch (addr) {
> +    case SYSCFG_MEMRMP:
> +        qemu_log_mask(LOG_UNIMP,
> +                      "STM32F205_syscfg_write: Changeing the memory mapping 
> " \

%s __func__ here and below.

> +                      "isn't supported in QEMU\n");
> +        return;
> +    case SYSCFG_PMC:
> +        qemu_log_mask(LOG_UNIMP,
> +                      "STM32F205_syscfg_write: Peripheral mode configuration 
> " \
> +                      "isn't supported in QEMU\n");
> +        return;
> +    case SYSCFG_EXTICR1:
> +        s->syscfg_exticr1 = (value & 0xFFFF);
> +        return;
> +    case SYSCFG_EXTICR2:
> +        s->syscfg_exticr2 = (value & 0xFFFF);
> +        return;
> +    case SYSCFG_EXTICR3:
> +        s->syscfg_exticr3 = (value & 0xFFFF);
> +        return;
> +    case SYSCFG_EXTICR4:
> +        s->syscfg_exticr4 = (value & 0xFFFF);
> +        return;
> +    case SYSCFG_CMPCR:
> +        s->syscfg_cmpcr = value;
> +        return;
> +    default:
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "STM32F205_syscfg_write: Bad offset %x\n", (int)addr);

Same as above.

> +    }
> +}
> +
> +static const MemoryRegionOps stm32f205_syscfg_ops = {
> +    .read = stm32f205_syscfg_read,
> +    .write = stm32f205_syscfg_write,
> +    .endianness = DEVICE_NATIVE_ENDIAN,
> +};
> +
> +static void stm32f205_syscfg_init(Object *obj)
> +{
> +    STM32f205SyscfgState *s = STM32F205_SYSCFG(obj);
> +
> +    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
> +
> +    memory_region_init_io(&s->mmio, obj, &stm32f205_syscfg_ops, s,
> +                          TYPE_STM32F205_SYSCFG, 0x2000);
> +    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
> +}
> +
> +static void stm32f205_syscfg_class_init(ObjectClass *klass, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(klass);
> +
> +    dc->reset = stm32f205_syscfg_reset;
> +}
> +
> +static const TypeInfo stm32f205_syscfg_info = {
> +    .name          = TYPE_STM32F205_SYSCFG,
> +    .parent        = TYPE_SYS_BUS_DEVICE,
> +    .instance_size = sizeof(STM32f205SyscfgState),
> +    .instance_init = stm32f205_syscfg_init,
> +    .class_init    = stm32f205_syscfg_class_init,
> +};
> +
> +static void stm32f205_syscfg_register_types(void)
> +{
> +    type_register_static(&stm32f205_syscfg_info);
> +}
> +
> +type_init(stm32f205_syscfg_register_types)
> diff --git a/include/hw/misc/stm32f205_syscfg.h 
> b/include/hw/misc/stm32f205_syscfg.h
> new file mode 100644
> index 0000000..9c5556f
> --- /dev/null
> +++ b/include/hw/misc/stm32f205_syscfg.h
> @@ -0,0 +1,61 @@
> +/*
> + * STM32F205 SYSCFG
> + *
> + * Copyright (c) 2014 Alistair Francis <address@hidden>
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a 
> copy
> + * of this software and associated documentation files (the "Software"), to 
> deal
> + * in the Software without restriction, including without limitation the 
> rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#ifndef HW_STM_SYSCFG_H
> +#define HW_STM_SYSCFG_H
> +
> +#include "hw/sysbus.h"
> +#include "hw/hw.h"
> +
> +#define SYSCFG_MEMRMP  0x00
> +#define SYSCFG_PMC     0x04
> +#define SYSCFG_EXTICR1 0x08
> +#define SYSCFG_EXTICR2 0x0C
> +#define SYSCFG_EXTICR3 0x10
> +#define SYSCFG_EXTICR4 0x14
> +#define SYSCFG_CMPCR   0x20
> +
> +#define TYPE_STM32F205_SYSCFG "stm32f205-syscfg"
> +#define STM32F205_SYSCFG(obj) \
> +    OBJECT_CHECK(STM32f205SyscfgState, (obj), TYPE_STM32F205_SYSCFG)
> +
> +typedef struct {
> +    /* <private> */
> +    SysBusDevice parent_obj;
> +
> +    /* <public> */
> +    MemoryRegion mmio;
> +
> +    uint32_t syscfg_memrmp;
> +    uint32_t syscfg_pmc;
> +    uint32_t syscfg_exticr1;
> +    uint32_t syscfg_exticr2;
> +    uint32_t syscfg_exticr3;
> +    uint32_t syscfg_exticr4;
> +    uint32_t syscfg_cmpcr;
> +
> +    qemu_irq irq;
> +} STM32f205SyscfgState;
> +

F2XX

Otherwise,

Reviewed-by: Peter Crosthwaite <address@hidden>

Regards,
Peter

> +#endif
> --
> 1.9.1
>
>