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[Qemu-devel] [PULL 22/34] target-mips: add msa_helper.c
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 22/34] target-mips: add msa_helper.c |
Date: |
Mon, 3 Nov 2014 16:11:36 +0000 |
From: Yongbok Kim <address@hidden>
add msa_helper.c
Reviewed-by: James Hogan <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/Makefile.objs | 2 +-
target-mips/msa_helper.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+), 1 deletion(-)
create mode 100644 target-mips/msa_helper.c
diff --git a/target-mips/Makefile.objs b/target-mips/Makefile.objs
index 716244f..108fd9b 100644
--- a/target-mips/Makefile.objs
+++ b/target-mips/Makefile.objs
@@ -1,4 +1,4 @@
obj-y += translate.o dsp_helper.o op_helper.o lmi_helper.o helper.o cpu.o
-obj-y += gdbstub.o
+obj-y += gdbstub.o msa_helper.o
obj-$(CONFIG_SOFTMMU) += machine.o
obj-$(CONFIG_KVM) += kvm.o
diff --git a/target-mips/msa_helper.c b/target-mips/msa_helper.c
new file mode 100644
index 0000000..b65fb27
--- /dev/null
+++ b/target-mips/msa_helper.c
@@ -0,0 +1,49 @@
+/*
+ * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
+ *
+ * Copyright (c) 2014 Imagination Technologies
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "exec/helper-proto.h"
+
+/* Data format min and max values */
+#define DF_BITS(df) (1 << ((df) + 3))
+
+#define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
+#define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
+
+#define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
+#define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
+
+#define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
+#define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
+
+#define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
+#define SIGNED(x, df) \
+ ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
+
+/* Element-by-element access macros */
+#define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
+
+static inline void msa_move_v(wr_t *pwd, wr_t *pws)
+{
+ uint32_t i;
+
+ for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
+ pwd->d[i] = pws->d[i];
+ }
+}
--
2.1.0
- [Qemu-devel] [PULL 07/34] target-mips: add TLBINV support, (continued)
- [Qemu-devel] [PULL 07/34] target-mips: add TLBINV support, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 10/34] target-mips: add Config5.SBRI, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 11/34] target-mips: implement forbidden slot, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 13/34] target-mips: add restrictions for possible values in registers, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 09/34] target-mips: update cpu_save/cpu_load to support new registers, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 15/34] target-mips: enable features in MIPS64R6-generic CPU, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 16/34] target-mips: add MSA defines and data structure, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 17/34] target-mips: add MSA exceptions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 19/34] target-mips: stop translation after ctc1, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 18/34] target-mips: remove duplicated mips/ieee mapping function, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 22/34] target-mips: add msa_helper.c,
Leon Alrae <=
- [Qemu-devel] [PULL 21/34] target-mips: add msa_reset(), global msa register, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 23/34] target-mips: add MSA branch instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 20/34] target-mips: add MSA opcode enum, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 14/34] target-mips: correctly handle access to unimplemented CP0 register, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 25/34] target-mips: add MSA I5 format instruction, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 24/34] target-mips: add MSA I8 format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 26/34] target-mips: add MSA BIT format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 27/34] target-mips: add MSA 3R format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 28/34] target-mips: add MSA ELM format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 30/34] target-mips: add MSA VEC/2R format instructions, Leon Alrae, 2014/11/03