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[Qemu-devel] [PULL 34/34] target-mips: add MSA support to mips32r5-gener
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 34/34] target-mips: add MSA support to mips32r5-generic |
Date: |
Mon, 3 Nov 2014 16:11:48 +0000 |
From: Yongbok Kim <address@hidden>
add MSA support to mips32r5-generic core definition
Signed-off-by: Yongbok Kim <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/translate_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index a69a724..4dee1ca 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -358,7 +358,7 @@ static const mips_def_t mips_defs[] =
(0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
(1 << CP0C1_CA),
.CP0_Config2 = MIPS_CONFIG2,
- .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M),
+ .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_MSAP),
.CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M),
.CP0_Config4_rw_bitmask = 0,
.CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_UFR),
@@ -376,7 +376,7 @@ static const mips_def_t mips_defs[] =
(0x93 << FCR0_PRID),
.SEGBITS = 32,
.PABITS = 32,
- .insn_flags = CPU_MIPS32R5 | ASE_MIPS16 | ASE_DSP | ASE_DSPR2,
+ .insn_flags = CPU_MIPS32R5 | ASE_MIPS16 | ASE_DSP | ASE_DSPR2 |
ASE_MSA,
.mmu_type = MMU_TYPE_R4000,
},
#if defined(TARGET_MIPS64)
--
2.1.0
- [Qemu-devel] [PULL 20/34] target-mips: add MSA opcode enum, (continued)
- [Qemu-devel] [PULL 20/34] target-mips: add MSA opcode enum, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 14/34] target-mips: correctly handle access to unimplemented CP0 register, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 25/34] target-mips: add MSA I5 format instruction, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 24/34] target-mips: add MSA I8 format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 26/34] target-mips: add MSA BIT format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 27/34] target-mips: add MSA 3R format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 28/34] target-mips: add MSA ELM format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 30/34] target-mips: add MSA VEC/2R format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 31/34] target-mips: add MSA 2RF format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 32/34] target-mips: add MSA MI10 format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 34/34] target-mips: add MSA support to mips32r5-generic,
Leon Alrae <=
- [Qemu-devel] [PULL 29/34] target-mips: add MSA 3RF format instructions, Leon Alrae, 2014/11/03
- [Qemu-devel] [PULL 33/34] disas/mips.c: disassemble MSA instructions, Leon Alrae, 2014/11/03
- Re: [Qemu-devel] [PULL 00/34] target-mips queue, Peter Maydell, 2014/11/04