Re: [Qemu-devel] [PATCH v10 07/26] target-arm: insert AArch32 cpregs twice into hashtable

[Peter Maydell]

On 6 November 2014 15:50, Greg Bellows <address@hidden> wrote:
> From: Fabian Aggeler <address@hidden>
>
> Prepare for cp register banking by inserting every cp register twice,
> once for secure world and once for non-secure world.
>
> Signed-off-by: Fabian Aggeler <address@hidden>
> Signed-off-by: Greg Bellows <address@hidden>
> +                    if (state == ARM_CP_STATE_AA32) {
> +                        /* Under AArch32 CP registers can be common
> +                         * (same for secure and non-secure world) or banked.
> +                         */
> +                         switch (r->secure) {
> +                         case ARM_CP_SECSTATE_S:
> +                         case ARM_CP_SECSTATE_NS:
> +                            add_cpreg_to_hashtable(cpu, r, opaque, state,
> +                                                   r->secure, crm, opc1, 
> opc2);
> +                            break;

Looks like you might have some 3-space indent going on here?
Otherwise
Reviewed-by: Peter Maydell <address@hidden>

thanks
-- PMM