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Re: [Qemu-devel] [PATCH v4 4/4] target-arm: Add AArch32 guest support to
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v4 4/4] target-arm: Add AArch32 guest support to KVM64 |
Date: |
Wed, 11 Feb 2015 04:16:59 +0000 |
On 10 February 2015 at 10:50, Greg Bellows <address@hidden> wrote:
> Add 32-bit to/from 64-bit register synchronization on register gets and puts.
> Set EL1_32BIT feature flag passed to KVM
>
> Signed-off-by: Greg Bellows <address@hidden>
>
> ---
>
> v3 -> v4
> - Add check that to make sure KVM64 is only being used on AArch64 family of
> machines.
> - Relocate register sync to follow register fetches.
> - Refresh env->aarch64 prior to use.
>
> v2 -> v3
> - Conditionalize sync of 32-bit and 64-bit registers
> ---
> target-arm/kvm64.c | 38 ++++++++++++++++++++++++++++++++++----
> 1 file changed, 34 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
> index 033babf..789933e 100644
> --- a/target-arm/kvm64.c
> +++ b/target-arm/kvm64.c
> @@ -81,8 +81,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
> int ret;
> ARMCPU *cpu = ARM_CPU(cs);
>
> - if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE ||
> - !arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
> + if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE &&
> + object_dynamic_cast(cpu, TYPE_AARCH64_CPU)) {
You've changed an OR check (fail if this CPU isn't supported
by KVM at all, or if it's not an AArch64-capable CPU) into
an AND check...
> fprintf(stderr, "KVM is not supported for this guest CPU type\n");
> return -EINVAL;
> }
> @@ -96,6 +96,9 @@ int kvm_arch_init_vcpu(CPUState *cs)
> cpu->psci_version = 2;
> cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2;
> }
> + if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
> + cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT;
> + }
>
> /* Do KVM_ARM_VCPU_INIT ioctl */
> ret = kvm_arm_vcpu_init(cs);
> @@ -133,6 +136,13 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> ARMCPU *cpu = ARM_CPU(cs);
> CPUARMState *env = &cpu->env;
>
> + /* If we are in AArch32 mode then we need to sync the AArch64 regs with
> the
> + * AArch32 regs before pushing them out 64-bit KVM.
"out to". Also, you're not syncing the 64 bit regs with the 32 bit ones,
you're copying the data from the 32-bit register state fields into
the 64 bit fields.
> + */
> + if (!is_a64(env)) {
> + aarch64_sync_32_to_64(env);
> + }
> +
> for (i = 0; i < 31; i++) {
> reg.id = AARCH64_CORE_REG(regs.regs[i]);
> reg.addr = (uintptr_t) &env->xregs[i];
> @@ -162,7 +172,11 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> }
>
> /* Note that KVM thinks pstate is 64 bit but we use a uint32_t */
> - val = pstate_read(env);
> + if (is_a64(env)) {
> + val = pstate_read(env);
> + } else {
> + val = cpsr_read(env);
> + }
> reg.id = AARCH64_CORE_REG(regs.pstate);
> reg.addr = (uintptr_t) &val;
> ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
> @@ -242,7 +256,14 @@ int kvm_arch_get_registers(CPUState *cs)
> if (ret) {
> return ret;
> }
> - pstate_write(env, val);
> +
> + env->aarch64 = ((val & PSTATE_nRW) == 0);
> + if (is_a64(env)) {
> + pstate_write(env, val);
> + } else {
> + env->uncached_cpsr = val & CPSR_M;
> + cpsr_write(env, val, 0xffffffff);
> + }
>
> /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
> * QEMU side we keep the current SP in xregs[31] as well.
> @@ -256,6 +277,15 @@ int kvm_arch_get_registers(CPUState *cs)
> return ret;
> }
>
> + /* If we are in AArch32 mode then we need to sync the AArch32 regs with
> the
> + * incoming AArch64 regs received from 64-bit KVM.
> + * We must perform this after all of the registers have been acquired
> from
> + * the kernel.
> + */
> + if (!is_a64(env)) {
> + aarch64_sync_64_to_32(env);
> + }
> +
> reg.id = AARCH64_CORE_REG(elr_el1);
> reg.addr = (uintptr_t) &env->elr_el[1];
> ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
> --
> 1.8.3.2
>
thanks
-- PMM
[Qemu-devel] [PATCH v4 4/4] target-arm: Add AArch32 guest support to KVM64, Greg Bellows, 2015/02/10
- Re: [Qemu-devel] [PATCH v4 4/4] target-arm: Add AArch32 guest support to KVM64,
Peter Maydell <=
Re: [Qemu-devel] [PATCH v4 0/4] target-arm: ARM64: Adding EL1 AARCH32 guest support, Alexander Spyridakis, 2015/02/11