I'm trying to understanding how disas_insn in target-i386/translate.c works.
However, I'm confused at disas_insn function.
In /* arith & logic */ part, when f == 0 (OP Ev, Gv) && mod != 3, I found these codes:
gen_lea_modrm(env, s, modrm);
opreg = OR_TMP0;
gen_op_mov_v_reg(ot, cpu_T, reg);
gen_op(s, op, ot, opreg);
I found that this is the code that trying to add (or other ops) a register to a memory address.
gen_lea_modrm will calculate the referenced memory address and store the final address in cpu_A0, but I can't find anywhere uses cpu_A0. Besides, I have no idea what are gen_op_mov_v_reg and gen_op doing. After these codes, disas_insn is returned.
I found in the last of the gen_lea_modrm will call "tcg_gen_ext32u_tl(cpu_A0, cpu_A0);", but when I trace the code I found "#define tcg_gen_ext32u_tl tcg_gen_mov_i32" and there's a condition that when "TCGV_EQUAL_I32(ret, arg)" is true, it will return immediately, so basically do nothing.
Did I misunderstanding the procedure?
I really appreciate any help you can provide.