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Re: [Qemu-devel] [PATCH v2 3/6] target-tricore: Add instructions of RRR2

From: Bastian Koppelmann
Subject: Re: [Qemu-devel] [PATCH v2 3/6] target-tricore: Add instructions of RRR2 opcode format
Date: Wed, 18 Feb 2015 00:06:05 +0000
User-agent: Mozilla/5.0 (X11; Linux i686; rv:31.0) Gecko/20100101 Thunderbird/31.4.0

On 02/17/2015 07:56 PM, Richard Henderson wrote:
On 02/11/2015 08:49 AM, Bastian Koppelmann wrote:
-    OPC2_32_RRR2_MADD_U_32                       = 0x68,
+    OPC2_32_RRR2_MADD_U_64                       = 0x68,
I guess this is a change to the spec, after the V1.0, 2012-05 edition that I 
Well, I guess this is a mistake in the documentation. The signature says the result is 32 bit, but the pseudo-code states E[c] = result[63:0] and E[c] is clearly a 64 bit register.
My tests with the manufacturers simulator show the 64 bit behavior, too.


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