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Re: [Qemu-devel] [PATCH] ahci: map memory via device's address space ins

From: Stefan Hajnoczi
Subject: Re: [Qemu-devel] [PATCH] ahci: map memory via device's address space instead of address_space_memory
Date: Thu, 26 Feb 2015 14:45:04 +0000
User-agent: Mutt/1.5.23 (2014-03-12)

On Wed, Feb 25, 2015 at 11:13:09PM -0600, Jordan Hargrave wrote:
> Referencing this old thread:
> https://lists.nongnu.org/archive/html/qemu-devel/2014-07/msg00606.html
> I've run into an issue recently with testing q35 DMAR/intel iommu with ahci
> driver.  My ahci driver writes the upper-32 bits (PORT_FIS_ADDR_HI) first
> then the lower 32-bits (PORT_FIS_ADDR).
> The contents of PORT_FIS_ADDR therefore are stale when the PORT_FIS_ADDR_HI
> write calls map_page().  DMAR translation fails at this point as the old
> stale address (from SEABIOS initialization) is not in the DMAR page table.

The AHCI device tries to map on register writes to both the base and
upper 32-bit registers.  So it should work for a driver that writes

Does the iommu failure pose a problem?


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