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Re: [Qemu-devel] [PATCH] ahci: map memory via device's address space ins
Re: [Qemu-devel] [PATCH] ahci: map memory via device's address space instead of address_space_memory
Thu, 26 Feb 2015 14:45:04 +0000
On Wed, Feb 25, 2015 at 11:13:09PM -0600, Jordan Hargrave wrote:
> Referencing this old thread:
> I've run into an issue recently with testing q35 DMAR/intel iommu with ahci
> driver. My ahci driver writes the upper-32 bits (PORT_FIS_ADDR_HI) first
> then the lower 32-bits (PORT_FIS_ADDR).
> The contents of PORT_FIS_ADDR therefore are stale when the PORT_FIS_ADDR_HI
> write calls map_page(). DMAR translation fails at this point as the old
> stale address (from SEABIOS initialization) is not in the DMAR page table.
The AHCI device tries to map on register writes to both the base and
upper 32-bit registers. So it should work for a driver that writes
PORT_FIS_ADDR_HI before PORT_FIS_ADDR.
Does the iommu failure pose a problem?
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