I used GDB to intercept the kvm_apic_mem_write(), we could find
that:
#0 kvm_apic_mem_write (opaque=0x55555652ddb0, addr=0, data=16465,
size=4) at /home/chenfan/data/qemu-latest/hw/i386/kvm/apic.c:157
#1 0x000055555565c871 in memory_region_write_accessor
(mr=0x55555652de28, addr=0, value=0x7fffe5027538, size=4, shift=0,
mask=4294967295)
at /home/chenfan/data/qemu-latest/memory.c:430
#2 0x000055555565c9b9 in access_with_adjusted_size (addr=0,
value=0x7fffe5027538, size=4, access_size_min=1, access_size_max=4, access=
0x55555565c7d9 <memory_region_write_accessor>, mr=0x55555652de28)
at /home/chenfan/data/qemu-latest/memory.c:467
#3 0x000055555565f9d1 in memory_region_dispatch_write
(mr=0x55555652de28, addr=0, data=16465, size=4)
at /home/chenfan/data/qemu-latest/memory.c:1103
#4 0x000055555566356e in io_mem_write (mr=0x55555652de28, addr=0,
val=16465, size=4) at /home/chenfan/data/qemu-latest/memory.c:2003
#5 0x00005555556060f2 in stl_phys_internal (as=0x5555577568a8,
addr=4276092928, val=16465, endian=DEVICE_LITTLE_ENDIAN)
#6 0x000055555560621e in stl_le_phys (as=0x5555577568a8,
addr=4276092928, val=16465) at /home/chenfan/data/qemu-latest/exec.c:2920
#7 0x000055555587d35e in *msi_notify* (dev=0x5555577566a0, vector=0) at
hw/pci/msi.c:294
#8 0x0000555555836f77 in ahci_irq_raise (s=0x555557756f20, dev=0x0) at
hw/ide/ahci.c:134
#9 0x00005555558370f2 in ahci_check_irq (s=0x555557756f20) at
hw/ide/ahci.c:169
#10 0x000055555583733a in ahci_port_write (s=0x555557756f20, port=0,
offset=20, val=2017460351) at hw/ide/ahci.c:225
#11 0x0000555555837811 in ahci_mem_write (opaque=0x555557756f20,
addr=276, val=2017460351, size=4) at hw/ide/ahci.c:382
#12 0x000055555565c871 in memory_region_write_accessor
(mr=0x555557756f40, addr=276, value=0x7fffe50278b8, size=4, shift=0,
mask=4294967295)
at /home/chenfan/data/qemu-latest/memory.c:430
#13 0x000055555565c9b9 in access_with_adjusted_size (addr=276,
value=0x7fffe50278b8, size=4, access_size_min=1, access_size_max=4, access=
0x55555565c7d9 <memory_region_write_accessor>, mr=0x555557756f40)
at /home/chenfan/data/qemu-latest/memory.c:467
#14 0x000055555565f9d1 in memory_region_dispatch_write
(mr=0x555557756f40, addr=276, data=2017460351, size=4)
at /home/chenfan/data/qemu-latest/memory.c:1103
#15 0x000055555566356e in io_mem_write (mr=0x555557756f40, addr=276,
val=2017460351, size=4) at /home/chenfan/data/qemu-latest/memory.c:2003
Thanks,
Chen
Thanks,
Chen
PS:
It should be part of APIC code or at worst case part of CPU's realize.
PS2:
new cpu tests don't test actual CPU execution, so they can't validate
this change. To test it you need to run test in TCG (at least) or
TCG + KVM mode, with some guest code that programs and checks APIC
of each CPU.
PS3:
the rest of the patch I'd suggest to merge with 2/2 patch that
removes unused icc_bridge code, there isn't point in splitting
that from removing icc_bridge from other files.
[...]
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f01690b..2385e6b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -42,7 +42,6 @@
#include "sysemu/sysemu.h"
#include "hw/qdev-properties.h"
-#include "hw/cpu/icc_bus.h"
#ifndef CONFIG_USER_ONLY
#include "hw/xen/xen.h"
#include "hw/i386/apic_internal.h"
@@ -2941,7 +2940,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
void *data)
xcc->parent_realize = dc->realize;
dc->realize = x86_cpu_realizefn;
- dc->bus_type = TYPE_ICC_BUS;
that isn't the only place in this file that should be changed.
See x86_cpu_apic_create():
cpu->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type);
probably it's not right to try get parent bus from bus-less device,
qdev_try_create() call should be replaced by object_new()/object_unref() pair.
dc->props = x86_cpu_properties;
xcc->parent_reset = cc->reset;
.
.