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Re: [Qemu-devel] [RFC PATCH 0/3] pflash_cfi01: allow reading/writing it


From: Peter Maydell
Subject: Re: [Qemu-devel] [RFC PATCH 0/3] pflash_cfi01: allow reading/writing it only in secure mode
Date: Fri, 10 Apr 2015 10:54:48 +0100

On 9 April 2015 at 17:27, Paolo Bonzini <address@hidden> wrote:
> As I understand it, on ARM secure (EL3) and non-secure (EL<3) modes have
> effectively different address spaces.  Therefore, one EL3 CPU could put
> the flash in MMIO mode for programming, while another EL1 CPU could be
> reading from the flash in ROM mode.

Well, not really -- you'd put the flash into the Secure address
space only. Then the CPU at EL3 could access it, but the CPU
at EL1 can never do so. For reading or writing UEFI variables
(or flashing a new UEFI firmware image) the EL1 OS must make a
monitor call (hypercall) up to EL3 to request that action.

-- PMM



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