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Re: [Qemu-devel] [PATCH v2 02/16] hw/arm/vexpress.c: Wire FIQ between CP
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 02/16] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC |
Date: |
Tue, 14 Apr 2015 19:48:00 +0100 |
On 30 October 2014 at 22:11, Greg Bellows <address@hidden> wrote:
> From: Fabian Aggeler <address@hidden>
>
> Connect FIQ output of the GIC CPU interfaces to the CPUs.
>
> Signed-off-by: Fabian Aggeler <address@hidden>
> ---
> hw/arm/vexpress.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
> index 7cbd13f..7121b8a 100644
> --- a/hw/arm/vexpress.c
> +++ b/hw/arm/vexpress.c
> @@ -229,6 +229,8 @@ static void init_cpus(const char *cpu_model, const char
> *privdev,
> DeviceState *cpudev = DEVICE(qemu_get_cpu(n));
>
> sysbus_connect_irq(busdev, n, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
> + sysbus_connect_irq(busdev, n+smp_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
> }
> }
This and patch 3 aren't wrong, but there's probably other board
level wiring up to do (eg setting the "enable security extns"
property on the GIC object). We should do all the board level
changes last, after the GIC changes.
-- PMM
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