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Re: [Qemu-devel] [PATCH] target-ppc: don't invalidate msr MSR_HVB bit in


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] target-ppc: don't invalidate msr MSR_HVB bit in cpu_post_load
Date: Fri, 17 Apr 2015 12:36:58 +0100

On 17 April 2015 at 10:44, Alexander Graf <address@hidden> wrote:
>
>
>> Am 17.04.2015 um 09:16 schrieb Mark Cave-Ayland <address@hidden>:
>>
>> The invalidation code introduced in commit 2360b works by inverting most bits
>> of env->msr to ensure that hreg_store_msr() will forcibly update the CPU env
>> state to reflect the new msr value post-migration. Unfortunately
>> hreg_store_msr() is called with alter_hv set to 0 which preserves the MSR_HVB
>> state from the CPU env which is now the opposite value to what it should be.
>>
>> Ensure that we don't invalidate the msr MSR_HVB bit during cpu_post_load so
>> that the correct value is restored. This fixes suspend/resume for PPC64.
>>
>> Reported-by: Stefan Berger <address@hidden>
>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>
> Reviewed-by: Alexander Graf <address@hidden>
>
> Peter, please apply this directly for 2.3, it fixes a regression :).

Applied to master, thanks.

-- PMM



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