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Re: [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default |
Date: |
Mon, 20 Apr 2015 14:07:53 +0200 |
On Mon, Apr 20, 2015 at 11:19:15AM +0200, Gerd Hoffmann wrote:
> ---
signature is missing.
And it might be a good idea to add a cover letter,
stick q35: in subject for patches, and add a
bit of description in the commit log.
Besides that
Reviewed-by: Michael S. Tsirkin <address@hidden>
> hw/pci-host/q35.c | 1 +
> include/hw/pci-host/q35.h | 7 ++++++-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 79bab15..9735db2 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -351,6 +351,7 @@ static void mch_reset(DeviceState *qdev)
> MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT);
>
> d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT;
> + d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT;
>
> mch_update(mch);
> }
> diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
> index e5d5a22..9704ccd 100644
> --- a/include/hw/pci-host/q35.h
> +++ b/include/hw/pci-host/q35.h
> @@ -129,7 +129,6 @@ typedef struct Q35PCIHost {
>
> #define MCH_HOST_BRIDGE_SMRAM 0x9d
> #define MCH_HOST_BRIDGE_SMRAM_SIZE 2
> -#define MCH_HOST_BRIDGE_SMRAM_DEFAULT ((uint8_t)0x2)
> #define MCH_HOST_BRIDGE_SMRAM_D_OPEN ((uint8_t)(1 << 6))
> #define MCH_HOST_BRIDGE_SMRAM_D_CLS ((uint8_t)(1 << 5))
> #define MCH_HOST_BRIDGE_SMRAM_D_LCK ((uint8_t)(1 << 4))
> @@ -140,6 +139,8 @@ typedef struct Q35PCIHost {
> #define MCH_HOST_BRIDGE_SMRAM_C_END 0xc0000
> #define MCH_HOST_BRIDGE_SMRAM_C_SIZE 0x20000
> #define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END 0x100000
> +#define MCH_HOST_BRIDGE_SMRAM_DEFAULT \
> + MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG
>
> #define MCH_HOST_BRIDGE_ESMRAMC 0x9e
> #define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 7))
> @@ -152,6 +153,10 @@ typedef struct Q35PCIHost {
> #define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_2MB ((uint8_t)(0x1 << 1))
> #define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_8MB ((uint8_t)(0x2 << 1))
> #define MCH_HOST_BRIDGE_ESMRAMC_T_EN ((uint8_t)1)
> +#define MCH_HOST_BRIDGE_ESMRAMC_DEFAULT \
> + (MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE | \
> + MCH_HOST_BRIDGE_ESMRAMC_SM_L1 | \
> + MCH_HOST_BRIDGE_ESMRAMC_SM_L2)
>
> /* D1:F0 PCIE* port*/
> #define MCH_PCIE_DEV 1
> --
> 1.8.3.1
- [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 2/6] add SMRAM+ESMRAMC wmask, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 5/6] [wip] tseg, part1, not (yet) tested, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 6/6] [wip] tseg, part2, not (yet) tested, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 3/6] q35: implement SMRAM.D_LCK, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 4/6] q35: add test for SMRAM.D_LCK, Gerd Hoffmann, 2015/04/20
- Re: [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default,
Michael S. Tsirkin <=