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Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr
From: |
Pavel Fedin |
Subject: |
Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr |
Date: |
Wed, 27 May 2015 21:03:55 +0300 |
Hello!
> I think encoding should be CPU type specific i.e. not defined by what
> GIC can support and once we add CPU type with 8 cores, it would provide
> it's own version of mpidr_read since it would be defined by spec
> how to encode aff0.
I have redone this thing from scratch:
https://lists.gnu.org/archive/html/qemu-devel/2015-05/msg04495.html
My implementation does exactly this. It simply introduces CPU-specific MPIDR
value which
CPUs can set as they wish. Also this is used by KVM because KVM has its own
ideas about
how CPUs are clustered.
I posted that without RFC, because i think it's ready for application, but my
message
seems to have been lost. Looks like i forgot Cc to the maintainer. My current
vGICv3
work-in-progress is based on this.
If Shlomo does not respond until friday, i think i'll post a new vGICv3 series
based on
master.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
- [Qemu-devel] [PATCH RFC V2 0/4] Implement GIC-500 from GICv3 family for arm64, shlomopongratz, 2015/05/06
- Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr, Igor Mammedov, 2015/05/27
- Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr, Shlomo Pongratz, 2015/05/28
- Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr, Igor Mammedov, 2015/05/28
- Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr, Shlomo Pongratz, 2015/05/28
- Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr, Pavel Fedin, 2015/05/28
[Qemu-devel] [PATCH RFC V2 3/4] GICv3 support, shlomopongratz, 2015/05/06
[Qemu-devel] [PATCH RFC V2 2/4] Implment GIC-500, shlomopongratz, 2015/05/06