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[Qemu-devel] [PULL 2/5] target-i386: Fix signedness of MSR_IA32_APICBASE
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 2/5] target-i386: Fix signedness of MSR_IA32_APICBASE_BASE |
Date: |
Tue, 2 Jun 2015 16:22:05 -0300 |
Existing definition triggers the following when using clang
-fsanitize=undefined:
hw/intc/apic_common.c:314:55: runtime error: left shift of 1048575 by 12
places cannot be represented in type 'int'
Fix it so we won't try to shift a 1 to the sign bit of a signed integer.
Suggested-by: Peter Maydell <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
target-i386/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 4ee12ca..26182bd 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -305,7 +305,7 @@
#define MSR_IA32_APICBASE 0x1b
#define MSR_IA32_APICBASE_BSP (1<<8)
#define MSR_IA32_APICBASE_ENABLE (1<<11)
-#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
+#define MSR_IA32_APICBASE_BASE (0xfffffU<<12)
#define MSR_IA32_FEATURE_CONTROL 0x0000003a
#define MSR_TSC_ADJUST 0x0000003b
#define MSR_IA32_TSCDEADLINE 0x6e0
--
2.1.0
- [Qemu-devel] [PULL 0/5] X86 queue 2015-06-02, Eduardo Habkost, 2015/06/02
- [Qemu-devel] [PULL 1/5] pc: Ensure non-zero CPU ref count after attaching to ICC bus, Eduardo Habkost, 2015/06/02
- [Qemu-devel] [PULL 2/5] target-i386: Fix signedness of MSR_IA32_APICBASE_BASE,
Eduardo Habkost <=
- [Qemu-devel] [PULL 3/5] apic: convert ->busdev.qdev casts to C casts, Eduardo Habkost, 2015/06/02
- [Qemu-devel] [PULL 4/5] target-i386: Register QOM properties for feature flags, Eduardo Habkost, 2015/06/02
- [Qemu-devel] [PULL 5/5] arch_init: Drop target-x86_64.conf, Eduardo Habkost, 2015/06/02
- Re: [Qemu-devel] [PULL 0/5] X86 queue 2015-06-02, Peter Maydell, 2015/06/04