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[Qemu-devel] [PULL 06/12] fdc: Disentangle phases in fdctrl_read_data()
From: |
John Snow |
Subject: |
[Qemu-devel] [PULL 06/12] fdc: Disentangle phases in fdctrl_read_data() |
Date: |
Fri, 5 Jun 2015 16:00:43 -0400 |
From: Kevin Wolf <address@hidden>
This commit makes similar improvements as have already been made to the
write function: Instead of relying on a flag in the MSR to distinguish
controller phases, use the explicit phase that we store now. Assertions
of the right MSR flags are added.
Signed-off-by: Kevin Wolf <address@hidden>
Reviewed-by: John Snow <address@hidden>
Message-id: address@hidden
Signed-off-by: John Snow <address@hidden>
---
hw/block/fdc.c | 33 +++++++++++++++++++++++----------
1 file changed, 23 insertions(+), 10 deletions(-)
diff --git a/hw/block/fdc.c b/hw/block/fdc.c
index 1cc1e3a..3c64194 100644
--- a/hw/block/fdc.c
+++ b/hw/block/fdc.c
@@ -1591,9 +1591,16 @@ static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
FLOPPY_DPRINTF("error: controller not ready for reading\n");
return 0;
}
+
+ /* If data_len spans multiple sectors, the current position in the FIFO
+ * wraps around while fdctrl->data_pos is the real position in the whole
+ * request. */
pos = fdctrl->data_pos;
pos %= FD_SECTOR_LEN;
- if (fdctrl->msr & FD_MSR_NONDMA) {
+
+ switch (fdctrl->phase) {
+ case FD_PHASE_EXECUTION:
+ assert(fdctrl->msr & FD_MSR_NONDMA);
if (pos == 0) {
if (fdctrl->data_pos != 0)
if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
@@ -1609,20 +1616,26 @@ static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
}
}
- }
- retval = fdctrl->fifo[pos];
- if (++fdctrl->data_pos == fdctrl->data_len) {
- fdctrl->data_pos = 0;
- /* Switch from transfer mode to status mode
- * then from status mode to command mode
- */
- if (fdctrl->msr & FD_MSR_NONDMA) {
+
+ if (++fdctrl->data_pos == fdctrl->data_len) {
fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
- } else {
+ }
+ break;
+
+ case FD_PHASE_RESULT:
+ assert(!(fdctrl->msr & FD_MSR_NONDMA));
+ if (++fdctrl->data_pos == fdctrl->data_len) {
fdctrl_to_command_phase(fdctrl);
fdctrl_reset_irq(fdctrl);
}
+ break;
+
+ case FD_PHASE_COMMAND:
+ default:
+ abort();
}
+
+ retval = fdctrl->fifo[pos];
FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
return retval;
--
2.1.0
- [Qemu-devel] [PULL 00/12] Ide patches, John Snow, 2015/06/05
- [Qemu-devel] [PULL 01/12] fdc: Rename fdctrl_reset_fifo() to fdctrl_to_command_phase(), John Snow, 2015/06/05
- [Qemu-devel] [PULL 02/12] fdc: Rename fdctrl_set_fifo() to fdctrl_to_result_phase(), John Snow, 2015/06/05
- [Qemu-devel] [PULL 05/12] fdc: Code cleanup in fdctrl_write_data(), John Snow, 2015/06/05
- [Qemu-devel] [PULL 07/12] fdc: Fix MSR.RQM flag, John Snow, 2015/06/05
- [Qemu-devel] [PULL 10/12] macio: switch pmac_dma_write() over to new offset/len implementation, John Snow, 2015/06/05
- [Qemu-devel] [PULL 09/12] macio: switch pmac_dma_read() over to new offset/len implementation, John Snow, 2015/06/05
- [Qemu-devel] [PULL 03/12] fdc: Introduce fdctrl->phase, John Snow, 2015/06/05
- [Qemu-devel] [PULL 11/12] macio: update comment/constants to reflect the new code, John Snow, 2015/06/05
- [Qemu-devel] [PULL 04/12] fdc: Use phase in fdctrl_write_data(), John Snow, 2015/06/05
- [Qemu-devel] [PULL 06/12] fdc: Disentangle phases in fdctrl_read_data(),
John Snow <=
- [Qemu-devel] [PULL 12/12] macio: remove remainder_len DBDMA_io property, John Snow, 2015/06/05
- [Qemu-devel] [PULL 08/12] fdc-test: Test state for existing cases more thoroughly, John Snow, 2015/06/05
- Re: [Qemu-devel] [PULL 00/12] Ide patches, Peter Maydell, 2015/06/08