Re: [Qemu-devel] [PATCH 4/6] xen/pass-through: correctly deal with RW1C bits

[Jan Beulich]

>>> On 16.06.15 at 16:19, <address@hidden> wrote:
> On Fri, 5 Jun 2015, Jan Beulich wrote:
>> @@ -1016,11 +1002,12 @@ static XenPTRegInfo xen_pt_emu_reg_pm[] 
>>          .size       = 2,
>>          .init_val   = 0x0008,
>>          .res_mask   = 0x00F0,
>> -        .ro_mask    = 0xE10C,
>> +        .ro_mask    = 0x610C,
>> +        .rw1c_mask  = 0x8000,
>>          .emu_mask   = 0x810B,
>>          .init       = xen_pt_common_reg_init,
>>          .u.w.read   = xen_pt_word_reg_read,
>> -        .u.w.write  = xen_pt_pmcsr_reg_write,
>> +        .u.w.write  = xen_pt_word_reg_write,
>>      },
>>      {
>>          .size = 0,
> 
> I can see that the code change doesn't cause a change in behaviour for
> PCI_PM_CTRL, but it does for PCI_STATUS, PCI_EXP_DEVSTA and
> PCI_EXP_LNKSTA. Please explain why in the commit message.

I'm not sure what you're after in a patch titled "correctly deal with
RW1C bits".

Jan