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Re: [Qemu-devel] [PATCH] disas/mips: fix disassembling R6 instructions
From: |
Leon Alrae |
Subject: |
Re: [Qemu-devel] [PATCH] disas/mips: fix disassembling R6 instructions |
Date: |
Wed, 8 Jul 2015 14:43:15 +0100 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 30/06/2015 16:33, Yongbok Kim wrote:
> In the Release 6 of the MIPS Architecture, LL, SC, LLD, SCD, PREF
> and CACHE instructions have 9 bits offsets.
>
> Signed-off-by: Yongbok Kim <address@hidden>
> ---
> disas/mips.c | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
Applied this and the other fix "target-mips: fix to clear MSACSR.Cause" to
mips-next, thanks.
Leon