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[Qemu-devel] [PATCH v11 19/19] i.MX: Adding i2C devices to i.MX31 SOC
From: |
Jean-Christophe Dubois |
Subject: |
[Qemu-devel] [PATCH v11 19/19] i.MX: Adding i2C devices to i.MX31 SOC |
Date: |
Wed, 8 Jul 2015 20:42:52 +0200 |
Signed-off-by: Jean-Christophe Dubois <address@hidden>
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6:
* not present on v6
Changes since v7:
* not present on v7
Changes since v8:
* not present on v8
Changes since v9:
* Added 3 I2C devices to i.MX31 SOC
Changes since v10:
* no change.
hw/arm/fsl-imx31.c | 30 ++++++++++++++++++++++++++++++
include/hw/arm/fsl-imx31.h | 12 ++++++++++++
2 files changed, 42 insertions(+)
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 8d349c9..fb46577 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -50,6 +50,11 @@ static void fsl_imx31_init(Object *obj)
object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
}
+
+ for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) {
+ object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
+ qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
+ }
}
static void fsl_imx31_realize(DeviceState *dev, Error **errp)
@@ -154,6 +159,31 @@ static void fsl_imx31_realize(DeviceState *dev, Error
**errp)
epit_table[i].irq));
}
+ /* Initialize all I2C */
+ for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) {
+ static const struct {
+ hwaddr addr;
+ unsigned int irq;
+ } i2c_table[FSL_IMX31_NUM_I2CS] = {
+ { FSL_IMX31_I2C1_ADDR, FSL_IMX31_I2C1_IRQ },
+ { FSL_IMX31_I2C2_ADDR, FSL_IMX31_I2C2_IRQ },
+ { FSL_IMX31_I2C3_ADDR, FSL_IMX31_I2C3_IRQ }
+ };
+
+ /* Initialize the I2C */
+ object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
+ if (err) {
+ error_propagate((errp), (err));
+ return;
+ }
+ /* Map I2C memory */
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
+ /* Connet I2C IRQ to PIC */
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->avic),
+ i2c_table[i].irq));
+ }
+
/* On a real system, the first 16k is a `secure boot rom' */
memory_region_init_rom_device(&s->secure_rom, NULL, NULL, NULL,
"imx31.secure_rom",
diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
index d8a7e86..32744a1 100644
--- a/include/hw/arm/fsl-imx31.h
+++ b/include/hw/arm/fsl-imx31.h
@@ -23,6 +23,7 @@
#include "hw/char/imx_serial.h"
#include "hw/timer/imx_gpt.h"
#include "hw/timer/imx_epit.h"
+#include "hw/i2c/imx_i2c.h"
#include "exec/memory.h"
#define TYPE_FSL_IMX31 "fsl,imx31"
@@ -30,6 +31,7 @@
#define FSL_IMX31_NUM_UARTS 2
#define FSL_IMX31_NUM_EPITS 2
+#define FSL_IMX31_NUM_I2CS 3
typedef struct FslIMX31State{
/*< private >*/
@@ -42,6 +44,7 @@ typedef struct FslIMX31State{
IMXSerialState uart[FSL_IMX31_NUM_UARTS];
IMXGPTState gpt;
IMXEPITState epit[FSL_IMX31_NUM_EPITS];
+ IMXI2CState i2c[FSL_IMX31_NUM_I2CS];
MemoryRegion secure_rom;
MemoryRegion rom;
MemoryRegion iram;
@@ -56,10 +59,16 @@ typedef struct FslIMX31State{
#define FSL_IMX31_IRAM_ALIAS_SIZE 0xFFC0000
#define FSL_IMX31_IRAM_ADDR 0x1FFFC000
#define FSL_IMX31_IRAM_SIZE 0x4000
+#define FSL_IMX31_I2C1_ADDR 0x43F80000
+#define FSL_IMX31_I2C1_SIZE 0x4000
+#define FSL_IMX31_I2C3_ADDR 0x43F84000
+#define FSL_IMX31_I2C3_SIZE 0x4000
#define FSL_IMX31_UART1_ADDR 0x43F90000
#define FSL_IMX31_UART1_SIZE 0x4000
#define FSL_IMX31_UART2_ADDR 0x43F94000
#define FSL_IMX31_UART2_SIZE 0x4000
+#define FSL_IMX31_I2C2_ADDR 0x43F98000
+#define FSL_IMX31_I2C2_SIZE 0x4000
#define FSL_IMX31_CCM_ADDR 0x53F80000
#define FSL_IMX31_CCM_SIZE 0x4000
#define FSL_IMX31_GPT_ADDR 0x53F90000
@@ -94,5 +103,8 @@ typedef struct FslIMX31State{
#define FSL_IMX31_GPT_IRQ 29
#define FSL_IMX31_UART2_IRQ 32
#define FSL_IMX31_UART1_IRQ 45
+#define FSL_IMX31_I2C1_IRQ 10
+#define FSL_IMX31_I2C2_IRQ 4
+#define FSL_IMX31_I2C3_IRQ 3
#endif /* FSL_IMX31_H */
--
2.1.4
- [Qemu-devel] [PATCH v11 11/19] i.MX: Fix Coding style for GPT emulator, (continued)
- [Qemu-devel] [PATCH v11 11/19] i.MX: Fix Coding style for GPT emulator, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 10/19] i.MX: Split GPT emulator in a header file and a source file, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 12/19] i.MX: Add SOC support for i.MX31, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 14/19] i.MX: Add I2C controller emulator, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 13/19] i.MX: KZM now uses the standalone i.MX31 SOC support, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 15/19] i.MX: Add FEC Ethernet Emulator, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 17/19] i.MX: Add the i.MX25 PDK plateform, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 16/19] i.MX: Add SOC support for i.MX25, Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 18/19] i.MX: Add qtest support for I2C device emulator., Jean-Christophe Dubois, 2015/07/08
- [Qemu-devel] [PATCH v11 19/19] i.MX: Adding i2C devices to i.MX31 SOC,
Jean-Christophe Dubois <=