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Re: [Qemu-devel] [RFC v3 00/13] Slow-path for atomic instruction transla
From: |
Mark Burton |
Subject: |
Re: [Qemu-devel] [RFC v3 00/13] Slow-path for atomic instruction translation |
Date: |
Fri, 10 Jul 2015 10:31:46 +0200 |
<big snip>
To be clear, for a normal user (e.g. they boot linux, they run some apps,
etc)..., if they use only one core, is it true that they will see no difference
in performance?
For a ‘normal user’ who does use multi-core, are you saying that a typical boot
is slower?
Cheers
Mark.
> On 10 Jul 2015, at 10:23, Alvise Rigo <address@hidden> wrote:
>
> * Performance considerations
> This implementation shows good results while booting a Linux kernel,
> where tons of flushes affect the overall performance. A complete ARM
> Linux boot, without any filesystem, requires 30% longer if compared to
> the mttcg implementation, benefiting however of being capable to offer
> the infrastructure to handle atomic instructions on any architecture.
> Instead compared to the current TCG upstream, it is 40% faster with four
> vCPUs and 2.1 times faster with 8 vCPUs.
> In addition, there is still margin to improve such performance, since at
> the moment TLB is flushed quite often, probably more than the required.
+44 (0)20 7100 3485 x 210
+33 (0)5 33 52 01 77x 210
+33 (0)603762104
mark.burton
[Qemu-devel] [RFC v3 11/13] Introduce exit_flush_req and tcg_excl_access_lock, Alvise Rigo, 2015/07/10
[Qemu-devel] [RFC v3 10/13] Simple TLB flush wrap to use as exit callback, Alvise Rigo, 2015/07/10
[Qemu-devel] [RFC v3 13/13] softmmu_template.h: move to multithreading, Alvise Rigo, 2015/07/10
[Qemu-devel] [RFC v3 12/13] softmmu_llsc_template.h: move to multithreading, Alvise Rigo, 2015/07/10
Re: [Qemu-devel] [RFC v3 00/13] Slow-path for atomic instruction translation,
Mark Burton <=
Re: [Qemu-devel] [RFC v3 00/13] Slow-path for atomic instruction translation, Frederic Konrad, 2015/07/10