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From: | Ефимов Василий |
Subject: | Re: [Qemu-devel] [PATCH v2] PAM: make PAM emulation closer to documentation |
Date: | Tue, 21 Jul 2015 14:09:48 +0300 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
21.07.2015 10:46, Paolo Bonzini пишет:
Out of curiosity, would it be necessary to flush the TLB when the PAM registers change? In QEMU, the TLB also has the function of a cache in some sense (because, by pointing to a ram_addr_t, it prevents reads, writes or fetches from going through the slow MMIO path).
There is exec.c: tcg_commit callback. It calls cpu-exec.c: cpu_reload_memory_map that calls cputlb.c:tlb_flush. When PAM register is changed pam_update is called. Its call is surrounded by memory_region_transaction_begin/_commit couple both in i440fx and MCH9 host bridges. tcg_commit and pam_mem_commit are called during memory_region_transaction_commit execution. To summarize: - TLB is flushed by existing code. - Should I remove pam_update_redirection call from pam_set_current? It will be called by pam_mem_commit soon? Note that a PAM API user should call memory_region_transaction_begin/_commit in this case.
Paolo
Vasily
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