[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH for-2.5 05/30] m68k: define operand sizes
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH for-2.5 05/30] m68k: define operand sizes |
Date: |
Sun, 9 Aug 2015 22:13:24 +0200 |
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 78 +++++++++++++++++++++++++++++--------------------
1 file changed, 47 insertions(+), 31 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 6ba71a2..eb7f503 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -146,11 +146,13 @@ typedef struct DisasContext {
static void *gen_throws_exception;
#define gen_last_qop NULL
-#define OS_BYTE 0
-#define OS_WORD 1
-#define OS_LONG 2
-#define OS_SINGLE 4
-#define OS_DOUBLE 5
+#define OS_BYTE 1
+#define OS_WORD 2
+#define OS_LONG 3
+#define OS_SINGLE 4
+#define OS_DOUBLE 5
+#define OS_EXTENDED 6
+#define OS_PACKED 7
typedef void (*disas_proc)(CPUM68KState *env, DisasContext *s, uint16_t insn);
@@ -446,11 +448,49 @@ static inline int opsize_bytes(int opsize)
case OS_LONG: return 4;
case OS_SINGLE: return 4;
case OS_DOUBLE: return 8;
+ case OS_EXTENDED: return 12;
+ case OS_PACKED: return 12;
default:
g_assert_not_reached();
}
}
+static inline int insn_opsize(int insn, int pos)
+{
+ switch ((insn >> pos) & 3) {
+ case 0:
+ return OS_BYTE;
+ case 1:
+ return OS_WORD;
+ case 2:
+ return OS_LONG;
+ default:
+ abort();
+ }
+}
+
+static inline int ext_opsize(int ext, int pos)
+{
+ switch ((ext >> pos) & 7) {
+ case 0:
+ return OS_LONG;
+ case 1:
+ return OS_SINGLE;
+ case 2:
+ return OS_EXTENDED;
+ case 3:
+ return OS_PACKED;
+ case 4:
+ return OS_WORD;
+ case 5:
+ return OS_DOUBLE;
+ case 6:
+ return OS_BYTE;
+ default:
+ abort();
+ }
+}
+
/* Assign value to a register. If the width is less than the register width
only the low part of the register is set. */
static void gen_partset_reg(int opsize, TCGv reg, TCGv val)
@@ -1321,19 +1361,7 @@ DISAS_INSN(clr)
{
int opsize;
- switch ((insn >> 6) & 3) {
- case 0: /* clr.b */
- opsize = OS_BYTE;
- break;
- case 1: /* clr.w */
- opsize = OS_WORD;
- break;
- case 2: /* clr.l */
- opsize = OS_LONG;
- break;
- default:
- abort();
- }
+ opsize = insn_opsize(insn, 6);
DEST_EA(env, insn, opsize, tcg_const_i32(0), NULL);
gen_logic_cc(s, tcg_const_i32(0));
}
@@ -1477,19 +1505,7 @@ DISAS_INSN(tst)
int opsize;
TCGv tmp;
- switch ((insn >> 6) & 3) {
- case 0: /* tst.b */
- opsize = OS_BYTE;
- break;
- case 1: /* tst.w */
- opsize = OS_WORD;
- break;
- case 2: /* tst.l */
- opsize = OS_LONG;
- break;
- default:
- abort();
- }
+ opsize = insn_opsize(insn, 6);
SRC_EA(env, tmp, opsize, 1, NULL);
gen_logic_cc(s, tmp);
}
--
2.4.3
- [Qemu-devel] [PATCH for-2.5 09/30] m68k: add X flag helpers, (continued)
- [Qemu-devel] [PATCH for-2.5 09/30] m68k: add X flag helpers, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 10/30] m68k: tst bugfix, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 11/30] m68k: improve clr/moveq, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 06/30] m68k: REG() macro cleanup, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 02/30] m68k: manage scaled index, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 05/30] m68k: define operand sizes,
Laurent Vivier <=
- [Qemu-devel] [PATCH for-2.5 12/30] m68k: Manage divw overflow, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 14/30] m68k: allow adda/suba to add/sub word, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 13/30] m68k: set Z and N on divu/muls overflow as a real 68040, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 07/30] m68k: allow to update flags with operation on words and bytes, Laurent Vivier, 2015/08/09