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Re: [Qemu-devel] [PATCH v8 1/5] Implement GIC-500 base class


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v8 1/5] Implement GIC-500 base class
Date: Tue, 11 Aug 2015 11:15:07 +0100

On 11 August 2015 at 10:35, Pavel Fedin <address@hidden> wrote:
>  Hello!
>
>> No it won't, because "don't impose an arbitrary 64 bit limit"
>> was one of my review comments on the emulation code; that
>> will need to be fixed before the emulation code can be accepted.
>
>  Sorry for may be being ignorant, i really had no time to read GICv3
> arch manual from beginning to end. Do you want to tell me that GICv3
> architecture puts no limit at all on CPU number, so i could have 128,
> 1024, 134435242, etc ?

Not as far as I know, beyond the limitations on the Affinity
fields (Aff0 recommended to be 0..15, and the total number
allowed via all 4 affinity fields). In any case, if you want
to impose a compile-time limit in the QEMU code then you need
to point out the part of the GIC spec that imposes that limit.

thanks
-- PMM



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