[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PULL 0/4] target-mips queue
|
From: |
Peter Maydell |
|
Subject: |
Re: [Qemu-devel] [PULL 0/4] target-mips queue |
|
Date: |
Fri, 14 Aug 2015 09:41:51 +0100 |
On 13 August 2015 at 17:45, Leon Alrae <address@hidden> wrote:
> Hi,
>
> First target-mips pull request for 2.5 consisting of patches sent during
> 2.4 freeze.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <address@hidden>
> Cc: Aurelien Jarno <address@hidden>
>
> The following changes since commit ca0e5d8b0d065a95d0f9042f71b2ace45b015596:
>
> Open 2.5 development tree (2015-08-11 23:15:55 +0100)
>
> are available in the git repository at:
>
> git://github.com/lalrae/qemu.git tags/mips-20150813
>
> for you to fetch changes up to c85570163bdf1ba29cb52a63f22ff1c48f1b9398:
>
> target-mips: Use CPU_LOG_INT for logging related to interrupts (2015-08-13
> 16:22:53 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2015-08-13
>
> Changes:
> * mips32r5-generic CPU updated and renamed to P5600
> * improvements in LWL/LDL, logging and fulong2e
Applied, thanks.
-- PMM