Re: [Qemu-devel] [PATCH v14 31/33] target-tilegx: Handle v4int_l/h

[Peter Maydell]

On 24 August 2015 at 17:17, Richard Henderson <address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target-tilegx/translate.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
> index 2a0798a..e922aee 100644
> --- a/target-tilegx/translate.c
> +++ b/target-tilegx/translate.c
> @@ -1125,10 +1125,18 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, 
> unsigned opext,
>      case OE_RRR(V4ADDSC, 0, X1):
>      case OE_RRR(V4ADD, 0, X0):
>      case OE_RRR(V4ADD, 0, X1):
> +        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
>      case OE_RRR(V4INT_H, 0, X0):
>      case OE_RRR(V4INT_H, 0, X1):
> +        tcg_gen_shri_tl(tdest, tsrcb, 32);
> +        tcg_gen_deposit_tl(tdest, tsrca, tdest, 0, 32);
> +        mnemonic = "v4int_h";
> +        break;
>      case OE_RRR(V4INT_L, 0, X0):
>      case OE_RRR(V4INT_L, 0, X1):
> +        tcg_gen_deposit_tl(tdest, tsrcb, tsrca, 32, 32);
> +        mnemonic = "v4int_l";
> +        break;
>      case OE_RRR(V4PACKSC, 0, X0):
>      case OE_RRR(V4PACKSC, 0, X1):
>      case OE_RRR(V4SHLSC, 0, X0):

Reviewed-by: Peter Maydell <address@hidden>

thanks
-- PMM