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[Qemu-devel] [PATCH] target-arm: Fix arm_excp_unmasked() function
From: |
Sergey Sorokin |
Subject: |
[Qemu-devel] [PATCH] target-arm: Fix arm_excp_unmasked() function |
Date: |
Wed, 2 Sep 2015 18:53:58 +0300 |
There is an error in arm_excp_unmasked() function:
bitwise operator & is used with integer and bool operands
causing an incorrect zeroed result.
The patch fixes it.
Signed-off-by: Sergey Sorokin <address@hidden>
---
target-arm/cpu.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 31825d3..8971348 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1519,8 +1519,8 @@ static inline bool arm_excp_unmasked(CPUState *cs,
unsigned int excp_idx,
CPUARMState *env = cs->env_ptr;
unsigned int cur_el = arm_current_el(env);
bool secure = arm_is_secure(env);
- uint32_t scr;
- uint32_t hcr;
+ bool scr;
+ bool hcr;
bool pstate_unmasked;
int8_t unmasked = 0;
@@ -1547,7 +1547,7 @@ static inline bool arm_excp_unmasked(CPUState *cs,
unsigned int excp_idx,
* set then FIQs can be masked by CPSR.F when non-secure but only
* when FIQs are only routed to EL3.
*/
- scr &= !((env->cp15.scr_el3 & SCR_FW) && !hcr);
+ scr = scr && !((env->cp15.scr_el3 & SCR_FW) && !hcr);
pstate_unmasked = !(env->daif & PSTATE_F);
break;
--
1.9.3
- [Qemu-devel] [PATCH] target-arm: Fix arm_excp_unmasked() function,
Sergey Sorokin <=