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Re: [Qemu-devel] [PATCH v2 10/11] target-arm: Recognize ROR
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v2 10/11] target-arm: Recognize ROR |
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Date: |
Mon, 7 Sep 2015 19:06:45 +0100 |
On 2 September 2015 at 18:57, Richard Henderson <address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target-arm/translate-a64.c | 33 +++++++++++++++++++++------------
> 1 file changed, 21 insertions(+), 12 deletions(-)
>
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v2 06/11] target-arm: Implement fcsel with movcond, (continued)
- [Qemu-devel] [PATCH v2 07/11] target-arm: Recognize SXTB, SXTH, SXTW, ASR, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH v2 09/11] target-arm: Eliminate unnecessary zero-extend in disas_bitfield, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH v2 08/11] target-arm: Recognize UXTB, UXTH, LSR, LSL, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH v2 11/11] target-arm: Use tcg_gen_extrh_i64_i32, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH v2 10/11] target-arm: Recognize ROR, Richard Henderson, 2015/09/02
- Re: [Qemu-devel] [PATCH v2 10/11] target-arm: Recognize ROR,
Peter Maydell <=