[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 05/14] target-tilegx: Implement crc instructions
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 05/14] target-tilegx: Implement crc instructions |
Date: |
Thu, 1 Oct 2015 12:38:37 +1000 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-tilegx/helper.c | 19 +++++++++++++++++++
target-tilegx/helper.h | 2 ++
target-tilegx/translate.c | 8 +++++++-
3 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/target-tilegx/helper.c b/target-tilegx/helper.c
index a01bb8d..cad5dae 100644
--- a/target-tilegx/helper.c
+++ b/target-tilegx/helper.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "exec/helper-proto.h"
+#include <zlib.h> /* For crc32 */
void helper_exception(CPUTLGState *env, uint32_t excp)
{
@@ -78,3 +79,21 @@ uint64_t helper_shufflebytes(uint64_t dest, uint64_t srca,
uint64_t srcb)
return vdst;
}
+
+uint64_t helper_crc32_8(uint64_t accum, uint64_t input)
+{
+ uint8_t buf = input;
+
+ /* zlib crc32 converts the accumulator and output to one's complement. */
+ return crc32(accum ^ 0xffffffff, &buf, 1) ^ 0xffffffff;
+}
+
+uint64_t helper_crc32_32(uint64_t accum, uint64_t input)
+{
+ uint8_t buf[4];
+
+ stl_le_p(buf, input);
+
+ /* zlib crc32 converts the accumulator and output to one's complement. */
+ return crc32(accum ^ 0xffffffff, buf, 4) ^ 0xffffffff;
+}
diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h
index d380d3b..72c8e92 100644
--- a/target-tilegx/helper.h
+++ b/target-tilegx/helper.h
@@ -4,6 +4,8 @@ DEF_HELPER_FLAGS_1(cnttz, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(pcnt, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(revbits, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_3(shufflebytes, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64)
+DEF_HELPER_FLAGS_2(crc32_8, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+DEF_HELPER_FLAGS_2(crc32_32, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 6bfb1af..3e5a8ea 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -750,9 +750,15 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned
opext,
case OE_RRR(CMULHR, 0, X0):
case OE_RRR(CMULH, 0, X0):
case OE_RRR(CMUL, 0, X0):
+ return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
case OE_RRR(CRC32_32, 0, X0):
+ gen_helper_crc32_32(tdest, tsrca, tsrcb);
+ mnemonic = "crc32_32";
+ break;
case OE_RRR(CRC32_8, 0, X0):
- return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
+ gen_helper_crc32_8(tdest, tsrca, tsrcb);
+ mnemonic = "crc32_8";
+ break;
case OE_RRR(DBLALIGN2, 0, X0):
case OE_RRR(DBLALIGN2, 0, X1):
gen_dblaligni(tdest, tsrca, tsrcb, 16);
--
2.4.3
- [Qemu-devel] [PATCH 03/14] target-tilegx: Implement v*add and v*sub instructions, (continued)
- [Qemu-devel] [PATCH 03/14] target-tilegx: Implement v*add and v*sub instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 13/14] target-tilegx: Fix a typo for mnemonic about "ld_add", Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 14/14] target-tilegx: Handle nofault prefetch instructions, Richard Henderson, 2015/10/08
- Message not available
- [Qemu-devel] [PATCH 11/14] target-tilegx: Decode ill pseudo-instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 12/14] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 04/14] target-tilegx: Implement v1multu instruction, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 02/14] target-tilegx: Implement v*shl, v*shru, and v*shrs instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 06/14] target-tilegx: Implement table index instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 10/14] linux-user/tilegx: Implement tilegx signal features, Richard Henderson, 2015/10/08
- [Qemu-devel] [PATCH 05/14] target-tilegx: Implement crc instructions,
Richard Henderson <=
- [Qemu-devel] [PATCH 08/14] target-tilegx: Let x1 pipe process bpt instruction only, Richard Henderson, 2015/10/08