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[Qemu-devel] [PATCH 70/77] ppc: Add dummy CIABR SPR
From: |
Benjamin Herrenschmidt |
Subject: |
[Qemu-devel] [PATCH 70/77] ppc: Add dummy CIABR SPR |
Date: |
Wed, 11 Nov 2015 11:28:23 +1100 |
We should implement HW breakpoint/watchpoint, qemu supports them...
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 334fcfe..bf8892a 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1402,6 +1402,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
ifetch)
#define SPR_DAWR (0x0B4)
#define SPR_MPPR (0x0B8)
#define SPR_RPR (0x0BA)
+#define SPR_CIABR (0x0BB)
#define SPR_DAWRX (0x0BC)
#define SPR_HFSCR (0x0BE)
#define SPR_VRSAVE (0x100)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index b1eba73..b5fd076 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7629,6 +7629,11 @@ static void gen_spr_book3s_207_dbg(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
+ spr_register_kvm_hv(env, SPR_CIABR, "CIABR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_CIABR, 0x00000000);
}
static void gen_spr_970_dbg(CPUPPCState *env)
--
2.5.0
- [Qemu-devel] [PATCH 64/77] ppc: Fix writing to AMR/UAMOR, (continued)
- [Qemu-devel] [PATCH 64/77] ppc: Fix writing to AMR/UAMOR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 65/77] ppc: Add POWER8 IAMR register, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 72/77] ppc: A couple more dummy POWER8 Book4 regs, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 67/77] ppc: Add dummy write to VTB, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 66/77] ppc: Add a few more P8 PMU SPRs, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 69/77] ppc: Add dummy POWER8 PSPB SPR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 68/77] ppc: Add dummy POWER8 MPPR register, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 77/77] ppc: Fix CFAR updates, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 71/77] ppc: Add dummy ACOP SPR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 73/77] ppc: Add KVM numbers to some P8 SPRs, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 70/77] ppc: Add dummy CIABR SPR,
Benjamin Herrenschmidt <=
- [Qemu-devel] [PATCH 75/77] ppc: Add dummy logmpp instruction, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 74/77] ppc: Print HSRR0/HSRR1 in "info registers", Benjamin Herrenschmidt, 2015/11/10
- [Qemu-devel] [PATCH 76/77] ppc: Add slbfee. instruction, Benjamin Herrenschmidt, 2015/11/10
- Re: [Qemu-devel] [Qemu-ppc] [PATCH 00/77] ppc: Add "native" POWER8 platform, Benjamin Herrenschmidt, 2015/11/10
- Re: [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Eric Blake, 2015/11/10