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Re: [Qemu-devel] [PATCH 1/4] target-tilegx: Add fpu header file
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 1/4] target-tilegx: Add fpu header file |
Date: |
Thu, 12 Nov 2015 16:10:04 +0000 |
On 12 November 2015 at 16:04, Chen Gang <address@hidden> wrote:
> On 11/12/15 22:34, Richard Henderson wrote:
>> On 11/08/2015 06:43 AM, Chen Gang wrote:
>>
>>> +#if !defined(HOST_WORDS_BIGENDIAN)
>>> + /* According to float(uns)sisf2 and float(uns)sidf2 in gcc tilegx.md */
>>> + uint64_t exp : 8; /* exp, 0x9e: 31 + TILEGX_F_EXP_FZERO */
>>> + uint64_t uiknown0 : 2; /* unknown */
>>
>> I would really rather you didn't use bitfields, because of exactly this sort
>> of endianness problem. Because, really, you can't trust this layout. But I
>> won't press this point, because it is complicated enough already.
>>
>
> Because of endianess issues, for me, I don't like bit fields either. But
> I can not find any other simpler ways than current.
> OK, I shall remove them.
>
>>> +#pragma pack(pop)
>>
>> Huh? What are you attempting to do here?
>>
>
> It is for matching "#pragma pack(push, 1)" which is above all related
> struct/unions in this header file.
Please don't use 'pragma pack' or bitfields. If you need to pack
and unpack things from a target-CPU defined field use bit operations
and/or extract32/deposit32/extract64/deposit64.
thanks
-- PMM
[Qemu-devel] [PATCH 2/4] target-tilegx: Implement fpu single floating point, Chen Gang, 2015/11/08
[Qemu-devel] [PATCH 3/4] target-tilegx: Implement fpu fdouble floating point, Chen Gang, 2015/11/08
[Qemu-devel] [PATCH 4/4] target-tilegx: Let fpu implementation code can be built and used, Chen Gang, 2015/11/08