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[Qemu-devel] [PATCH v2 13/19] target-arm: Add QOM property for Secure me
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 13/19] target-arm: Add QOM property for Secure memory region |
Date: |
Mon, 16 Nov 2015 14:05:17 +0000 |
Add QOM property to the ARM CPU which boards can use to tell us what
memory region to use for secure accesses. Nonsecure accesses
go via the memory region specified with the base CPU class 'memory'
property.
By default, if no secure region is specified it is the same as the
nonsecure region, and if no nonsecure region is specified we will use
address_space_memory.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu-qom.h | 3 +++
target-arm/cpu.c | 32 ++++++++++++++++++++++++++++++++
target-arm/cpu.h | 6 ++++++
3 files changed, 41 insertions(+)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 25fb1ce..8cb5bd5 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -87,6 +87,9 @@ typedef struct ARMCPU {
/* GPIO outputs for generic timer */
qemu_irq gt_timer_outputs[NUM_GTIMERS];
+ /* MemoryRegion to use for secure physical accesses */
+ MemoryRegion *secure_memory;
+
/* 'compatible' string for this CPU for Linux device trees */
const char *dtb_compatible;
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 30739fc..690d984 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -542,6 +542,15 @@ static void arm_cpu_post_init(Object *obj)
*/
qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el3_property,
&error_abort);
+
+#ifndef CONFIG_USER_ONLY
+ object_property_add_link(obj, "secure-memory",
+ TYPE_MEMORY_REGION,
+ (Object **)&cpu->secure_memory,
+ qdev_prop_allow_set_link_before_realize,
+ OBJ_PROP_LINK_UNREF_ON_RELEASE,
+ &error_abort);
+#endif
}
if (arm_feature(&cpu->env, ARM_FEATURE_MPU)) {
@@ -665,6 +674,29 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
**errp)
init_cpreg_list(cpu);
+#ifndef CONFIG_USER_ONLY
+ if (cpu->has_el3) {
+ cs->num_ases = 2;
+ } else {
+ cs->num_ases = 1;
+ }
+
+ if (cpu->has_el3) {
+ AddressSpace *as;
+
+ if (!cpu->secure_memory) {
+ cpu->secure_memory = cs->memory;
+ }
+ as = address_space_init_shareable(cpu->secure_memory,
+ "cpu-secure-memory");
+ cpu_address_space_init(cs, as, ARMASIdx_S);
+ }
+ cpu_address_space_init(cs,
+ address_space_init_shareable(cs->memory,
+ "cpu-memory"),
+ ARMASIdx_NS);
+#endif
+
qemu_init_vcpu(cs);
cpu_reset(cs);
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 815fef8..9108b5b 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1720,6 +1720,12 @@ static inline int cpu_mmu_index(CPUARMState *env, bool
ifetch)
return el;
}
+/* Indexes used when registering address spaces with cpu_address_space_init */
+typedef enum ARMASIdx {
+ ARMASIdx_NS = 0,
+ ARMASIdx_S = 1,
+} ARMASIdx;
+
/* Return the Exception Level targeted by debug exceptions;
* currently always EL1 since we don't implement EL2 or EL3.
*/
--
1.9.1
- [Qemu-devel] [PATCH v2 05/19] include/qom/cpu.h: Add new asidx_from_attrs method, (continued)
- [Qemu-devel] [PATCH v2 05/19] include/qom/cpu.h: Add new asidx_from_attrs method, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 17/19] hw/arm/virt: Wire up memory region to CPUs explicitly, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 15/19] target-arm: Implement cpu_get_phys_page_attrs_debug, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 10/19] exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_write, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 18/19] [RFC] hw/arm/virt: add secure memory region and UART, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 12/19] qom/cpu: Add MemoryRegion property, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 04/19] include/qom/cpu.h: Add new get_phys_page_attrs_debug method, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 13/19] target-arm: Add QOM property for Secure memory region,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 16/19] target-arm: Support multiple address spaces in page table walks, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 02/19] exec.c: Allow target CPUs to define multiple AddressSpaces, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 19/19] HACK: rearrange the virt memory map to suit OP-TEE, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 06/19] cputlb.c: Use correct address space when looking up MemoryRegionSection, Peter Maydell, 2015/11/16
- [Qemu-devel] [PATCH v2 14/19] target-arm: Implement asidx_from_attrs, Peter Maydell, 2015/11/16