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[Qemu-devel] [PATCH 02/25] target-sparc: Remove softint as a TCG global
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 02/25] target-sparc: Remove softint as a TCG global |
Date: |
Thu, 17 Dec 2015 12:54:32 -0800 |
The global is only ever read for one insn; we can just as well
use a load from env instead and generate the same code. This
also allows us to indicate the the associated helpers do not
touch TCG globals.
Signed-off-by: Richard Henderson <address@hidden>
---
target-sparc/helper.h | 6 +++---
target-sparc/translate.c | 5 ++---
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/target-sparc/helper.h b/target-sparc/helper.h
index 336a80c..5268f28 100644
--- a/target-sparc/helper.h
+++ b/target-sparc/helper.h
@@ -21,9 +21,9 @@ DEF_HELPER_4(ldda_asi, void, env, tl, int, int)
DEF_HELPER_5(ldf_asi, void, env, tl, int, int, int)
DEF_HELPER_FLAGS_5(stf_asi, TCG_CALL_NO_WG, void, env, tl, int, int, int)
DEF_HELPER_FLAGS_5(casx_asi, TCG_CALL_NO_WG, tl, env, tl, tl, tl, i32)
-DEF_HELPER_2(set_softint, void, env, i64)
-DEF_HELPER_2(clear_softint, void, env, i64)
-DEF_HELPER_2(write_softint, void, env, i64)
+DEF_HELPER_FLAGS_2(set_softint, TCG_CALL_NO_RWG, void, env, i64)
+DEF_HELPER_FLAGS_2(clear_softint, TCG_CALL_NO_RWG, void, env, i64)
+DEF_HELPER_FLAGS_2(write_softint, TCG_CALL_NO_RWG, void, env, i64)
DEF_HELPER_FLAGS_2(tick_set_count, TCG_CALL_NO_RWG, void, ptr, i64)
DEF_HELPER_FLAGS_1(tick_get_count, TCG_CALL_NO_RWG_SE, i64, ptr)
DEF_HELPER_FLAGS_2(tick_set_limit, TCG_CALL_NO_RWG, void, ptr, i64)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index c818a36..e517726 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -58,7 +58,6 @@ static TCGv_i32 cpu_xcc, cpu_asi, cpu_fprs;
static TCGv cpu_gsr;
static TCGv cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr;
static TCGv cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver;
-static TCGv_i32 cpu_softint;
#else
static TCGv cpu_wim;
#endif
@@ -2737,7 +2736,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
gen_store_gpr(dc, rd, cpu_gsr);
break;
case 0x16: /* Softint */
- tcg_gen_ext_i32_tl(cpu_dst, cpu_softint);
+ tcg_gen_ld32s_tl(cpu_dst, cpu_env,
+ offsetof(CPUSPARCState, softint));
gen_store_gpr(dc, rd, cpu_dst);
break;
case 0x17: /* Tick compare */
@@ -5335,7 +5335,6 @@ void gen_intermediate_code_init(CPUSPARCState *env)
{ &cpu_xcc, offsetof(CPUSPARCState, xcc), "xcc" },
{ &cpu_asi, offsetof(CPUSPARCState, asi), "asi" },
{ &cpu_fprs, offsetof(CPUSPARCState, fprs), "fprs" },
- { &cpu_softint, offsetof(CPUSPARCState, softint), "softint" },
#else
{ &cpu_wim, offsetof(CPUSPARCState, wim), "wim" },
#endif
--
2.5.0
- [Qemu-devel] [PATCH 00/25] target-sparc improvements, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 03/25] target-sparc: Store mmu index in TB flags, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 04/25] target-sparc: Create gen_exception, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 02/25] target-sparc: Remove softint as a TCG global,
Richard Henderson <=
- [Qemu-devel] [PATCH 01/25] target-sparc: Mark more flags for helpers, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 10/25] target-sparc: Add UA2011 defines to asi.h, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 12/25] target-sparc: Add MMU_REAL_IDX, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 17/25] target-sparc: Fix obvious error in ASI_M_BFILL, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 15/25] target-sparc: Introduce gen_check_align, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 14/25] target-sparc: Use QT0 to return results from ldda, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 19/25] target-sparc: Directly implement easy ldf/stf asis, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 20/25] target-sparc: Directly implement block and short ldf/stf asis, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 21/25] target-sparc: Remove helper_ldf_asi, helper_stf_asi, Richard Henderson, 2015/12/17
- [Qemu-devel] [PATCH 23/25] target-sparc: Use cpu_fsr in stfsr, Richard Henderson, 2015/12/17