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[Qemu-devel] [PATCH v4 4/7] mips/kvm: Support unsigned KVM registers
From: |
James Hogan |
Subject: |
[Qemu-devel] [PATCH v4 4/7] mips/kvm: Support unsigned KVM registers |
Date: |
Fri, 18 Dec 2015 10:46:01 +0000 |
Add KVM register access functions for the uint32_t type. This is
required for FP and MSA control registers, which are represented as
unsigned 32-bit integers.
Signed-off-by: James Hogan <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Cc: Leon Alrae <address@hidden>
Cc: Aurelien Jarno <address@hidden>
---
Changes in v3:
- Fix big endian (the pointer passed to the kernel must be for the
actual 32-bit value, not a temporary 64-bit value, otherwise on big
endian systems the kernel will only interpret the upper half).
---
target-mips/kvm.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index b777a5e93fb1..a11095f273f0 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -248,6 +248,17 @@ static inline int kvm_mips_put_one_reg(CPUState *cs,
uint64_t reg_id,
return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
}
+static inline int kvm_mips_put_one_ureg(CPUState *cs, uint64_t reg_id,
+ uint32_t *addr)
+{
+ struct kvm_one_reg cp0reg = {
+ .id = reg_id,
+ .addr = (uintptr_t)addr
+ };
+
+ return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
+}
+
static inline int kvm_mips_put_one_ulreg(CPUState *cs, uint64_t reg_id,
target_ulong *addr)
{
@@ -282,6 +293,17 @@ static inline int kvm_mips_get_one_reg(CPUState *cs,
uint64_t reg_id,
return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
}
+static inline int kvm_mips_get_one_ureg(CPUState *cs, uint64_t reg_id,
+ uint32_t *addr)
+{
+ struct kvm_one_reg cp0reg = {
+ .id = reg_id,
+ .addr = (uintptr_t)addr
+ };
+
+ return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
+}
+
static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id,
target_ulong *addr)
{
--
2.4.10
- [Qemu-devel] [PATCH v4 0/7] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests, James Hogan, 2015/12/18
- [Qemu-devel] [PATCH v4 4/7] mips/kvm: Support unsigned KVM registers,
James Hogan <=
- [Qemu-devel] [PATCH v4 2/7] mips/kvm: Implement PRid CP0 register, James Hogan, 2015/12/18
- [Qemu-devel] [PATCH v4 1/7] mips/kvm: Remove a couple of noisy DPRINTFs, James Hogan, 2015/12/18
- [Qemu-devel] [PATCH v4 5/7] mips/kvm: Support signed 64-bit KVM registers, James Hogan, 2015/12/18
- [Qemu-devel] [PATCH v4 3/7] mips/kvm: Implement Config CP0 registers, James Hogan, 2015/12/18
- [Qemu-devel] [PATCH v4 6/7] mips/kvm: Support FPU in MIPS KVM guests, James Hogan, 2015/12/18
- [Qemu-devel] [PATCH v4 7/7] mips/kvm: Support MSA in MIPS KVM guests, James Hogan, 2015/12/18