[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH] intel_iommu: large page support
|
From: |
Jason Wang |
|
Subject: |
Re: [Qemu-devel] [PATCH] intel_iommu: large page support |
|
Date: |
Fri, 15 Jan 2016 11:15:40 +0800 |
|
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 |
On 01/14/2016 05:28 PM, Michael S. Tsirkin wrote:
> On Thu, Jan 14, 2016 at 12:47:24AM -0500, Jason Wang wrote:
>> > Current intel_iommu only supports 4K page which may not be sufficient
>> > to cover guest working set. This patch tries to enable 2M and 1G mapping
>> > for intel_iommu. This is also useful for future device IOTLB
>> > implementation to have a better hit rate.
>> >
>> > Major work is adding a page mask field on IOTLB entry to make it
>> > support large page. And also use the slpte level as key to do IOTLB
>> > lookup. MAMV was increased to 18 to support direct invalidation for 1G
>> > mapping.
>> >
>> > Cc: Michael S. Tsirkin <address@hidden>
>> > Cc: Paolo Bonzini <address@hidden>
>> > Cc: Richard Henderson <address@hidden>
>> > Cc: Eduardo Habkost <address@hidden>
>> > Signed-off-by: Jason Wang <address@hidden>
> Looks good, thanks!
>
> I was going to comment that changes such as MAMV would
> have to be versioned, when I noticed that this device
> is unmigrateable ATM.
>
> So no issue, but we do need to fix migration for it.
>
Yes, it was in my TODO list. Will first see if there're more caps that
needs to be added. (Otherwise, we may have a long property list for iommu).