[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 8/8] target-arm: ignore ELR_ELx[1] for exception
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH 8/8] target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode |
Date: |
Tue, 19 Jan 2016 17:56:31 +0100 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Thu, Jan 14, 2016 at 06:34:11PM +0000, Peter Maydell wrote:
> The architecture requires that for an exception return to AArch32 the
> low bits of ELR_ELx are ignored when the PC is set from them:
> * if returning to Thumb mode, ignore ELR_ELx[0]
> * if returning to ARM mode, ignore ELR_ELx[1:0]
>
> We were only squashing bit 0; also squash bit 1 if the SPSR T bit
> indicates this is a return to ARM code.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
> ---
> target-arm/op_helper.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index 5789ccb..171d6b8 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -738,7 +738,11 @@ void HELPER(exception_return)(CPUARMState *env)
> }
> aarch64_sync_64_to_32(env);
>
> - env->regs[15] = env->elr_el[cur_el] & ~0x1;
> + if (spsr & CPSR_T) {
> + env->regs[15] = env->elr_el[cur_el] & ~0x1;
> + } else {
> + env->regs[15] = env->elr_el[cur_el] & ~0x3;
> + }
> } else {
> env->aarch64 = 1;
> pstate_write(env, spsr);
> --
> 1.9.1
>
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64(), (continued)
Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64(), Sergey Fedorov, 2016/01/29
[Qemu-devel] [PATCH 4/8] target-arm: Pull semihosting handling out to arm_cpu_do_interrupt(), Peter Maydell, 2016/01/14
[Qemu-devel] [PATCH 8/8] target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode, Peter Maydell, 2016/01/14
[Qemu-devel] [PATCH 2/8] target-arm: Move aarch64_cpu_do_interrupt() to helper.c, Peter Maydell, 2016/01/14
[Qemu-devel] [PATCH 6/8] target-arm: Handle exception return from AArch64 to non-EL0 AArch32, Peter Maydell, 2016/01/14
[Qemu-devel] [PATCH 5/8] target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target, Peter Maydell, 2016/01/14