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[Qemu-devel] [PULL 04/17] target-arm: Apply S2 MMU startlevel table size
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/17] target-arm: Apply S2 MMU startlevel table size check to AArch64 |
Date: |
Wed, 3 Feb 2016 18:59:07 +0000 |
From: "Edgar E. Iglesias" <address@hidden>
The S2 starting level table size check applies to both AArch32
and AArch64. Move it to common code.
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index b631b83..f5e6fb1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6775,11 +6775,19 @@ typedef enum {
static bool check_s2_startlevel(ARMCPU *cpu, bool is_aa64, int level,
int inputsize, int stride)
{
+ const int grainsize = stride + 3;
+ int startsizecheck;
+
/* Negative levels are never allowed. */
if (level < 0) {
return false;
}
+ startsizecheck = inputsize - ((3 - level) * stride + grainsize);
+ if (startsizecheck < 1 || startsizecheck > stride + 4) {
+ return false;
+ }
+
if (is_aa64) {
unsigned int pamax = arm_pamax(cpu);
@@ -6803,20 +6811,12 @@ static bool check_s2_startlevel(ARMCPU *cpu, bool
is_aa64, int level,
g_assert_not_reached();
}
} else {
- const int grainsize = stride + 3;
- int startsizecheck;
-
/* AArch32 only supports 4KB pages. Assert on that. */
assert(stride == 9);
if (level == 0) {
return false;
}
-
- startsizecheck = inputsize - ((3 - level) * stride + grainsize);
- if (startsizecheck < 1 || startsizecheck > stride + 4) {
- return false;
- }
}
return true;
}
--
1.9.1
- [Qemu-devel] [PULL 16/17] arm/boot: move highbank secure board setup code to common routine, (continued)
- [Qemu-devel] [PULL 16/17] arm/boot: move highbank secure board setup code to common routine, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 17/17] raspi: add raspberry pi 2 machine, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 15/17] bcm2836: add bcm2836 SoC device, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 05/17] target-arm: Rename check_s2_startlevel to check_s2_mmu_setup, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 08/17] libvixl: Avoid std::abs() of 64-bit type, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 12/17] bcm2835_ic: add bcm2835 interrupt controller, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 11/17] bcm2835_property: add bcm2835 property channel, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 02/17] target-arm: Make various system registers visible to EL3, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 09/17] target-arm: Don't report presence of EL2 if it doesn't exist, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 03/17] hw/arm: Setup EL1 and EL2 in AArch64 mode for 64bit Linux boots, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 04/17] target-arm: Apply S2 MMU startlevel table size check to AArch64,
Peter Maydell <=
- [Qemu-devel] [PULL 10/17] bcm2835_mbox: add BCM2835 mailboxes, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 14/17] bcm2836_control: add bcm2836 ARM control logic, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 06/17] target-arm: Implement the S2 MMU inputsize > pamax check, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 07/17] arm: virt-acpi: each MADT.GICC entry as enabled unconditionally, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 13/17] bcm2835_peripherals: add rollup device for bcm2835 peripherals, Peter Maydell, 2016/02/03
- Re: [Qemu-devel] [PULL 00/17] target-arm queue, Peter Maydell, 2016/02/04