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[Qemu-devel] [PULL 10/11] ahci: explicitly reject bad engine states on p
From: |
John Snow |
Subject: |
[Qemu-devel] [PULL 10/11] ahci: explicitly reject bad engine states on post_load |
Date: |
Wed, 10 Feb 2016 14:38:08 -0500 |
Currently, we let ahci_cond_start_engines reject weird configurations
where either the DMA (CLB) or FIS engines are said to be started, but
their matching on/off control bit is toggled off.
There should be no way to achieve this, since any time you toggle the
control bit off, the status bit should always follow synchronously.
Preparing for a refactor in cond_start_engines, move the rejection logic
straight up into post_load.
Signed-off-by: John Snow <address@hidden>
Message-id: address@hidden
---
hw/ide/ahci.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index ff338fe..9f4a672 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -218,10 +218,6 @@ static int ahci_cond_start_engines(AHCIDevice *ad, bool
allow_stop)
} else if (pr->cmd & PORT_CMD_LIST_ON) {
if (allow_stop) {
ahci_unmap_clb_address(ad);
- } else {
- error_report("AHCI: DMA engine should be off, "
- "but appears to still be running");
- return -1;
}
}
@@ -234,10 +230,6 @@ static int ahci_cond_start_engines(AHCIDevice *ad, bool
allow_stop)
} else if (pr->cmd & PORT_CMD_FIS_ON) {
if (allow_stop) {
ahci_unmap_fis_address(ad);
- } else {
- error_report("AHCI: FIS receive engine should be off, "
- "but appears to still be running");
- return -1;
}
}
@@ -1568,10 +1560,23 @@ static int ahci_state_post_load(void *opaque, int
version_id)
int i, j;
struct AHCIDevice *ad;
NCQTransferState *ncq_tfs;
+ AHCIPortRegs *pr;
AHCIState *s = opaque;
for (i = 0; i < s->ports; i++) {
ad = &s->dev[i];
+ pr = &ad->port_regs;
+
+ if (!(pr->cmd & PORT_CMD_START) && (pr->cmd & PORT_CMD_LIST_ON)) {
+ error_report("AHCI: DMA engine should be off, but status bit "
+ "indicates it is still running.");
+ return -1;
+ }
+ if (!(pr->cmd & PORT_CMD_FIS_RX) && (pr->cmd & PORT_CMD_FIS_ON)) {
+ error_report("AHCI: FIS RX engine should be off, but status bit "
+ "indicates it is still running.");
+ return -1;
+ }
/* Only remap the CLB address if appropriate, disallowing a state
* transition from 'on' to 'off' it should be consistent here. */
--
2.4.3
- [Qemu-devel] [PULL 00/11] Ide patches, John Snow, 2016/02/10
- [Qemu-devel] [PULL 01/11] ide: Prohibit RESET on IDE drives, John Snow, 2016/02/10
- [Qemu-devel] [PULL 00/11] Ide patches, John Snow, 2016/02/10
- [Qemu-devel] [PULL 03/11] ide: move buffered DMA cancel to core, John Snow, 2016/02/10
- [Qemu-devel] [PULL 04/11] ide: replace blk_drain_all by blk_drain, John Snow, 2016/02/10
- [Qemu-devel] [PULL 02/11] ide: code motion, John Snow, 2016/02/10
- [Qemu-devel] [PULL 05/11] ide: Add silent DRQ cancellation, John Snow, 2016/02/10
- [Qemu-devel] [PULL 06/11] ide: fix device_reset to not ignore pending AIO, John Snow, 2016/02/10
- [Qemu-devel] [PULL 07/11] fdc: always compile-check debug prints, John Snow, 2016/02/10
- [Qemu-devel] [PULL 10/11] ahci: explicitly reject bad engine states on post_load,
John Snow <=
- [Qemu-devel] [PULL 08/11] ahci: Do not unmap NULL addresses, John Snow, 2016/02/10
- [Qemu-devel] [PULL 09/11] ahci: handle LIST_ON and FIS_ON in map helpers, John Snow, 2016/02/10
- [Qemu-devel] [PULL 11/11] ahci: prohibit "restarting" the FIS or CLB engines, John Snow, 2016/02/10